Elevated source/drain with solid phase diffused source/drain ext

Details Elevated source/drain with solid phase diffused source/drain ext Elevated source/drain with solid phase diffused source/drain ext

1995-07-03

1996-04-02

Thomas, Tom

Fishing, trapping, and vermin destroying

437 34, 437160, 437162, 437 41, H01L 2182

Patent

active

055040314

ABSTRACT:
A method of forming an elevated source/drain structure with a solid phase diffused source/drain extension is described. A semiconductor substrate is provided having n-channel and p-channel active areas separated by isolation areas. Gate electrodes are formed overlying a gate oxide layer over each of the active areas. First spacers are formed on the sidewalls of the gate electrodes wherein the first spacers have a first dopant concentration. The first spacers in the p-channel active area are removed and second spacers are formed on the sidewalls of the gate electrodes in the p-channel active area wherein the second spacers have a second dopant concentration different from the first dopant concentration. An epitaxial layer is grown on the surface of the semiconductor substrate wherein the epitaxial layer forms the elevated source/drain structure. First ions are implanted into the n-channel active area and second ions are implanted into the p-channel active area. The first and second ions are driven in to form heavily doped regions within the semiconductor substrate underlying the elevated source/drain structure. The driving in also drives in the first and second dopant concentrations of the first and second spacers to form source/drain extensions within the n-channel and p-channel active areas underlying the first and second spacers to complete the formation of the elevated source/drain structure with solid-phase diffused source/drain extensions in the manufacture of an integrated circuit.

REFERENCES:
patent: 5024959 (1991-06-01), Pfiester
patent: 5079180 (1992-01-01), Rudder et al.
patent: 5242847 (1993-09-01), Ozturk et al.
patent: 5296737 (1994-03-01), Kawai et al.
patent: 5342797 (1994-08-01), Sapp et al.
"Reverse Elevated Source/Drain (Resd) Mosfet for Deep Submicron Cmos" by J. R. Pfiester, et al, IEDM, 192, 885-888

Affiliated with

Also associated with

Rating

Elevated source/drain with solid phase diffused source/drain ext does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Elevated source/drain with solid phase diffused source/drain ext, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Elevated source/drain with solid phase diffused source/drain ext will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2016042