Elementary cell for constructing asynchronous superconducting lo

Details Elementary cell for constructing asynchronous superconducting lo Elementary cell for constructing asynchronous superconducting lo

1995-11-27

1997-01-28

Westin, Edward P.

Electronic digital logic circuitry

Superconductor

Tunneling device

326 1, 326 3, H03K 19195

Patent

active

055981054

ABSTRACT:
An elementary cell uses single-flux-quanta as two-valued logic propagation signals and is effective for Constructing asynchronous superconducting logic circuits. The elementary cell comprises one OR circuit section and one AND circuit section. Input pulses applied to two input terminals of the elementary cell are split at signal splitting sections in the elementary cell and applied to both inputs of the OR circuit section and both inputs of the AND circuit section. The output of the OR circuit section is defined as the OR output of the elementary cell. A first arrival pulse memory section is provided in the AND circuit section and when one of two input pulses input to the two input terminals of the AND circuit section arrives before the other, this fact is recorded in the first arrival pulse memory section as logical "1". When the other input pulse arrives while logical "1" is recorded in the first arrival pulse memory section, the AND circuit section produces an AND output which is defined as the AND output of the elementary cell. When a reset signal pulse is applied to a reset terminal, the first arrival pulse memory section is reset.

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patent: 5164618 (1992-11-01), Murphy
patent: 5233242 (1993-08-01), Murphy
patent: 5233243 (1993-08-01), Murphy

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