Element formation substrate for forming semiconductor device

Details Element formation substrate for forming semiconductor device Element formation substrate for forming semiconductor device

2007-10-23

2007-10-23

Lewis, Monica (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S507000, C438S455000

Reexamination Certificate

active

10407677

ABSTRACT:
A support-side substrate having a thermal oxide film on the major surface is bonded to an active-layer-side substrate having a thermal oxide film on the major surface while making the major surfaces oppose each other. The active-layer-side substrate and part of the oxide film are selectively etched from a surface opposite to the major surface of the active-layer-side substrate to a halfway depth of the buried oxide film formed from the thermal oxide films at the bonding portion. A sidewall insulating film is formed on the etching side surface portion of the active-layer-side substrate. Then, the remaining buried oxide film except that immediately under the active-layer-side substrate is selectively etched. A single-crystal semiconductor layer is formed on the support-side substrate exposed by removing the buried oxide film.

REFERENCES:
patent: 4908328 (1990-03-01), Hu et al.
patent: 5194395 (1993-03-01), Wada
patent: 5578518 (1996-11-01), Koike et al.
patent: 5894152 (1999-04-01), Jaso et al.
patent: 6531754 (2003-03-01), Nagano et al.
patent: 6624047 (2003-09-01), Sakaguchi et al.
patent: 6635543 (2003-10-01), Furukawa et al.
patent: 6635915 (2003-10-01), Kokubun
patent: 6844242 (2005-01-01), Naruoka et al.
patent: 6855976 (2005-02-01), Nagano et al.
patent: 2003/0075260 (2003-04-01), Mitani
patent: 64-12543 (1989-01-01), None
patent: 5-129173 (1993-05-01), None
patent: 8-17694 (1996-01-01), None
patent: 8-274286 (1996-10-01), None
patent: 9-64321 (1997-03-01), None
patent: 11-017001 (1999-01-01), None
patent: 11-17001 (1999-01-01), None
patent: 2002-110948 (2002-04-01), None
Peter Van Zant, Microchip Fabrication, 2000 McGraw-Hill, p. 391 and 392.
S. Wolf, Silicon Processing, 1990, Lattice Press, p. 253.
S. Wolf, Silicon Processing for the VLSI Era, Lattice Press, 1995, vol. III, pp. 634 and 635.
Peter Van Zant, Microchip Fabrication, 2000, McGraw-Hill, Fourth Edition, p. 154.
R. Hannon et al., “0.25 μm Merged Bulk DRAM and SOI Logic Using Patterned SOI”, 2000 Symposium on VLSI Technology Digest of Technical Papers, pp. 66-67, (2000).
H.L. Ho et al., “A 0.13 μm High-Performance SOI Logic Technology With Embedded DRAM for System-on-a-Chip Application”, IEDM, No. 01, pp. 503-506, (2001).
H. Nagano et al., “Manufacturing Method of Partial SOI Wafer, Semiconductor Device Using the Partial SOI Wafer and Manufacturing Method Thereof”, Pending U.S. Appl. No. 10/083,131, filed Feb. 27, 2002.
T. Yamada et al., “Semiconductor Device Having One of Patterned SOI and SON Structure”, Pending U.S. Appl. No. 10/096,655, filed Mar. 14, 2002.
H. Nagano et al., “Semiconductor Device Using Partial SOI Substrate and Manufacturing Method Thereof”, Pending U.S. Appl. No. 10/078,344, Feb. 21, 2002.
H. Nagano et al., “Semiconductor Device Formed in Semiconductor Layer Arranged on Substrate With One of Insulating Film and Cavity Interposed Between the Substrate and the Semiconductor Layer”, Pending U.S. Appl. No. 10/091,448, filed Mar. 7, 2002.
T. Yamada et al., “Semiconductor Chip Having Multiple Functional Blocks Integrated in a Single Chip and Method for Fabricating the Same”, Pending U.S. Appl. No. 09/995,594, filed Nov. 29, 2001.
H. Nagano et al., “Semiconductor Device Substrate and Method of Manufacturing Semiconductor Device Substrate” Pending U.S. Appl. No. 10,237,206, filed Sep. 9, 2002.
Japanese Patent Office Final Notice of Rejection and English translation thereof in Japanese Patent Application No. 2003-012197, dated Nov. 17, 2006.

Affiliated with

Also associated with

Rating

Element formation substrate for forming semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Element formation substrate for forming semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Element formation substrate for forming semiconductor device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3903216