Electricity: electrical systems and devices – Electric charge generating or conducting means – Use of forces of electric charge or field
Reexamination Certificate
2000-11-16
2002-11-26
Sircus, Brian (Department: 2836)
Electricity: electrical systems and devices
Electric charge generating or conducting means
Use of forces of electric charge or field
Reexamination Certificate
active
06487063
ABSTRACT:
FIELD OF THE INVENTION
This invention pertains to microlithography (transfer of an image of a pattern, defined by a reticle or mask, to a sensitive substrate using an energy beam). Microlithography is a key technique used in the manufacture of microelectronic devices such as integrated circuits, displays, and the like. More specifically, this invention pertains to microlithography performed using a charged particle beam, wherein pattern-image transfer is performed in a vacuum chamber. Even more specifically, the invention pertains to an electrostatic chuck to which the substrate (e.g., semiconductor wafer) is mounted during transfer of the pattern to the substrate.
BACKGROUND OF THE INVENTION
Charged-particle-beam (CPB) microlithography is performed in a vacuum chamber, with the substrate (“wafer”) mounted to the surface of an electrostatic wafer chuck. Specifically, the underside of the wafer is mounted to an upstream-facing mounting surface of the chuck to present the resist-coated upstream-facing surface of the wafer for microlithography. Desirably, the wafer chuck holds the wafer such that the resist-coated surface is planar during microlithography. To such end, an attractive force between the mounting surface and the wafer typically is produced electrostatically. The electrostatic force is generated by electrically energizing electrodes situated beneath the mounting surface.
The wafer chuck should hold the wafer firmly and completely during microlithographic exposure. In actual practice, however, mounting difficulties can arise whenever the wafer is warped or otherwise deformed. For example, if the central region of the wafer domes “downward” (toward the mounting surface of the chuck), then the central region of the wafer is attached easily to the mounting surface of the chuck by energizing the electrodes. Also, as the more peripheral regions of the wafer are drawn progressively to the mounting surface, the center of the wafer tends to flatten. In contrast, whenever the central region of the wafer is domed “upward” (away from the mounting surface of the chuck), the initial strong attraction of the periphery of the wafer to the mounting surface of the chuck tends to prevent the central region of the wafer from being drawn toward the mounting surface of the chuck. As a result, the wafer, when mounted to the chuck surface, does not present a planar upstream-facing surface for microlithography.
A conventional electrostatic chuck configured to solve such a problem is disclosed in Japan Kôkai Patent Document No. Sho 60-95932. In this electrostatic chuck, an electrode situated on a round insulated base plate is covered with an insulation layer. The external upstream-facing surface of the insulation layer serves as the mounting surface of the chuck. The electrode is divided into a circular central region surrounded by a peripheral region. A voltage is applied first to the central-region electrode to draw the central region of the wafer under-surface toward the mounting surface of the chuck. After a specified delay time, a voltage is applied to the peripheral-region electrode to attach the peripheral region of the wafer under-surface to the chuck.
The following Equation (1) defines attachment force (“chuck power”) P per unit of surface area of the mounting surface of the chuck:
P=∈
0
∈*
2
V
2
/[2(
d+∈*x
)
2
] (1)
wherein ∈
0
s the dielectric constant of a vacuum, ∈* is relative dielectric constant of the dielectric used to make the insulation layer of the chuck, V is the voltage applied to the chuck electrode (chuck voltage), d is the thickness of the insulation layer, and x is the thickness of a vacuum layer situated between the mounting surface of the chuck and the under-surface of the wafer.
As is apparent from Equation (1), a vacuum layer (having a thickness x) situated between the wafer and the mounting surface causes the effective thickness of the dielectric layer to be increased to greater than d. This causes a local corresponding decrease in chuck power P. To obtain maximal attachment force of the wafer to the mounting surface of the chuck, the vacuum layer ideally has a thickness x=0.
With a conventional electrostatic chuck, if the wafer periphery is warped downward to an extent not exceeding a certain threshold, then by applying a sufficiently high voltage to the electrodes of the chuck the wafer can be “flattened” sufficiently (by the central region of the wafer being attracted to the mounting surface) to cause substantially the entire under-surface of the wafer to contact the mounting surface. However, if such peripheral warping of the wafer exceeds the threshold, then a substantial vacuum-layer thickness x persists between the central region of the under-surface of the wafer and the mounting surface of the chuck. The vacuum layer causes a substantial decrease of chuck power P in the central region of the wafer, leaving the central region of the wafer actually not contacting the mounting surface. Meanwhile, even though the peripheral region of the wafer is attached to the mounting surface, the persistent vacuum layer beneath the central region of the wafer prevents, during exposure of the wafer, heat in the central region of the wafer from being conducted away by the chuck. Consequently, the wafer temperature rises sufficiently to cause significant thermal deformation of the wafer, making accurate pattern transfer very difficult or impossible to perform.
SUMMARY OF THE INVENTION
In view of the disadvantages of the prior art as summarized above, an object of the invention is to provide electrostatic wafer chucks configured to achieve easy and ready attachment of the entire downstream-facing surface of the wafer to the mounting surface of the chuck. Such attachment is achievable with comparatively small respective voltages being applied to the chuck electrodes, even whenever the wafer periphery is warped downward toward the mounting surface (i.e., whenever the central region of the wafer is domed away from the mounting surface). Another object is to provide charged-particle-beam (CPB) microlithography apparatus that comprise such a wafer chuck. Yet another object is to provide wafer-holding methods for CPB microlithography, including use of such a chuck.
To such end and according to a first aspect of the invention, electrostatic wafer chucks are provided. An embodiment of such a wafer chuck comprises a base plate, an insulating layer, and first and second electrodes. The base plate comprises a first region and a second region. The first region includes a central region and a peripheral segment region, and the second region includes a general peripheral region that, in combination with the peripheral segment region, surrounds the central region. The insulating layer overlies the base plate and defines a wafer-mounting surface of the chuck. The first and second electrode sets are situated between the base plate and insulating layer. The first electrode set is located in the first region so as to occupy the central region and peripheral segment region, and the second electrode set is located in the second region so as to occupy the general peripheral region. The chuck also includes a power supply connected to the first and second electrode sets. The power supply is configured, when starting energization of the chuck to hold a substrate to the wafer-mounting surface electrostatically, to electrically energize the first electrode set before energizing the second electrode set.
With such a wafer chuck, whenever the peripheral region of the wafer or other substrate (generally referred to herein as a “wafer”) is warped toward the wafer-mounting surface, the peripheral region is attracted to the wafer-mounting surface. According to the invention, by electrically energizing (i.e., applying voltage to) the first electrode set in the first region before energizing the second electrode set in the second region, any gap between the wafer and the wafer-mounting surface is reduced automatically. I.e., a region on the per
Kitov Z
Klarquist & Sparkman, LLP
Nikon Corporation
Sircus Brian
LandOfFree
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