Electrostatic protection circuit of an input/output circuit of a

Details Electrostatic protection circuit of an input/output circuit of a Electrostatic protection circuit of an input/output circuit of a

1997-04-03

1999-03-16

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

327310, 327319, 327389, H03K 1716

Patent

active

058835407

ABSTRACT:
An electrostatic protection circuit in a internal circuit isolated from a substrate bias which protects the internal circuit from static electricity with regard to any of three different sources of bias voltage. An electrostatic protection circuit is constructed for each source of bias voltage so that the internal circuit is protected from static electricity flowing through bonding pads of the isolated circuit. The protective circuit comprises a plurality of NMOS or PMOS transistors for protecting input/output buffers and drivers from the static electricity flowing through the bonding pads. The respective NMOS or PMOS transistors are connected to the respective source voltage terminals and the input/output drivers.

REFERENCES:
patent: 4691217 (1987-09-01), Ueno et al
patent: 5574395 (1996-11-01), Kusakabe
patent: 5705941 (1998-01-01), Fukazawa et al.

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