Electrostatic discharge test structure system and method

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

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3241581, G01R 3128

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active

056752601

ABSTRACT:
System and method for optimizing the structure of a transistor to withstand electrostatic discharge by quantitatively evaluating the amount of electrostatic discharge that integrated circuit field effect transistors may endure before material damage results thereto. The system and method utilizes a plurality of test devices, each having certain differences in structure, which are fabricated onto a common integrated circuit substrate for contemporaneous testing of each device under controlled quantitative conditions. The test results may be organized into a "matrix experiment". A matrix experiment is a set of experiments where the settings or values of several product or process parameters to be studied are changed from one experiment to another. An orthogonal matrix array may be utilized to enhance the reliability of the data analysis, and may effectively reduce the number of experiments necessary to establish a reliable conclusion from the limited number of tests performed.

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Garcia; "Voltage Checking Device"; IBM Technical Disclosure Bulletin vol. 8, No. 4; Sep. 1965 p. 666.
Carlo, Jr. et al; "Automatic Threshold Voltage Monitor for Stressed FET Devices"; IBM Technical Disclosure Bulletin; vol. 15 No. 2; Jul. 1972 pp. 675-676.

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