Electrostatic discharge protection for MOSFETs

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S356000, C257S378000

Reexamination Certificate

active

06429491

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to combined MOSFET/bipolar transistor construction, and, more particularly, to a transistor construction that contains built-in protection against potentially destructive static electricity.
BACKGROUND
Static electricity is of particular concern to manufacturers and users of semiconductor devices, the field to which the present invention is directed. Metal-on-silicon field effect transistors, “MOSFETS”, are particularly vulnerable to static electricity. Discharging the static electric charge built up on the body of a person, or on parts of automated equipment, through a MOSFET may destroy the transistor by breaking down and physically rupturing the internal structure of the transistor, specifically, the dielectric insulating element. Breakdown of that element renders the transistor non-functional.
The gate of presently available MOSFETs is insulated by a layer of glass (SiO
2
) that is only a few tens of angstroms (IA=0.1 nm) thick. That insulating layer serves as the dielectric between the gate and the body region of the MOSFET. The foregoing three elements of an individual MOSFET define an electrical capacitor.
As is known, the capacitance value (sic capacitance) of a capacitor is directly proportional to the confronting area of spaced conductive plates, inversely proportional to the space separating (and insulating) the plates from one another and is directly proportional to the dielectric constant of the insulating material (the dielectric) disposed in the separating space. When an electrical charge is transferred to a capacitor, a voltage develops between the spaced plates, creating an electric field through the dielectric. The resulting electric field may be strong enough to damage the dielectric.
An integrated circuit (IC) contains many different electronic devices formed of transistors all of which are fabricated upon a single substrate of semiconductive material. Those electronic devices may include large numbers of CMOS gates, logic devices, that serve as input-output (I/O) drivers, the function of which is to supply driving current to other devices. Each such CMOS gate may be formed of an N-channel transistor and a P-channel transistor connected electrically in series, referred to as a complementary MOSFET pair. Those I/O transistors are exposed to possible contact with external sources of electrical charge. Should a single transistor on that integrated circuit be destroyed by an electrostatic discharge, the entire integrated circuit becomes useless.
Accordingly, an object of the present invention is to protect transistors from static electricity.
And a further object of the invention is to protect transistors and associated circuitry from the destructive effect of static charge that originates from sources external to the transistors.
SUMMARY OF THE INVENTION
In accordance with the invention, a MOSFET transistor contains functional elements that together define an electrical capacitance, which may be damaged by a static electrical charge, when not connected in a circuit. The novel additional semiconductor device, a lateral bipolar transistor, is incorporated within the MOSFET to bypass the charge harmlessly, preventing that charge from attaining a level at which said voltage spanning the dielectric element of the MOSFET breaks down the dielectric. While serving to protect the MOSFET against static electricity, the bipolar transistor does not adversely affect normal operation of the MOSFET.
The foregoing and additional objects and advantages of the invention together with the structure characteristic thereof, which was only briefly summarized in the foregoing passages, will become more apparent to those skilled in the art upon reading the detailed description of a preferred embodiment of the invention, which follows in this specification, taken together with the illustrations thereof presented in the accompanying drawings.


REFERENCES:
patent: 5449939 (1995-09-01), Horiguchi et al.
patent: 5910675 (1999-06-01), Horiguchi et al.

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