Electrostatic discharge protection element

Details Electrostatic discharge protection element Electrostatic discharge protection element

2011-04-05

2011-04-05

Andújar, Leonardo (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S360000, C257SE27016

Reexamination Certificate

active

07919816

ABSTRACT:
A gate controlled fin resistance element for use as an electrostatic discharge (ESD) protection element in an electrical circuit has a fin structure having a first connection region, a second connection region and a channel region formed between the first and second connection regions. Furthermore, the fin resistance element has a gate region formed at least over a part of the surface of the channel region. The gate region is electrically coupled to a gate control device, which gate control device controls an electrical potential applied to the gate region in such a way that the gate controlled fin resistance element has a high electrical resistance during a first operating state of the electrical circuit and a lower electrical resistance during a second operating state, which is characterized by the occurrence of an ESD event.

REFERENCES:
patent: 5526315 (1996-06-01), Kaya et al.
patent: 5610790 (1997-03-01), Staab et al.
patent: 5646808 (1997-07-01), Nakauama
patent: 6413802 (2002-07-01), Hu et al.
patent: 6919602 (2005-07-01), Lin et al.
patent: 7348642 (2008-03-01), Nowak
patent: 2003/0201457 (2003-10-01), Lin et al.
patent: 2004/0036126 (2004-02-01), Chau et al.
patent: 2004/0219760 (2004-11-01), Chaine et al.
patent: 2005/0056892 (2005-03-01), Seliskar
patent: 2005/0087811 (2005-04-01), Liao et al.
patent: 2006/0113600 (2006-06-01), Salling et al.
patent: 2006/0114628 (2006-06-01), Fukuda
patent: 2006/0157791 (2006-07-01), Lee et al.
patent: 2006/0164180 (2006-07-01), Nowak
patent: 2006/0214233 (2006-09-01), Ananthanarayanan et al.
patent: 2006/0273372 (2006-12-01), Voldman et al.
patent: 2007/0090460 (2007-04-01), Agam et al.
patent: 10103297 (2002-08-01), None
patent: 5-335567 (1993-12-01), None
patent: 8-51184 (1996-02-01), None
patent: 2002-16263 (2002-01-01), None
patent: 2004-55583 (2004-02-01), None
patent: 512510 (1990-12-01), None
patent: 1220314 (1992-09-01), None
patent: 200511551 (1992-09-01), None
patent: WO 2004/051749 (2004-06-01), None
ESD Evaluation of the Emerging MuGFET Technology, C. Russ, H. Gossner, T. Schulz, N. Chaudhary, W. Xiong, A. Marshall, C. Duvvury, K. Schruefer, C.R. Cleavelin, EOS/ESDS Symposium, 2005, pp. 1-4.
EPFL Electronics Laboratories Advanced Engineering Course on Circuit Design Challenges in Nanometer-Scale CMOS, Part I, Lausanne, Jul. 4-8, 2005, pp. 1-20.
Taiwanese Office Action.
Japanese Office Action with English translation dated May 18, 2010.

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