Electrostatic-discharge protection device and method for making

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257133, 257362, 257363, H01L 2362

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active

059593326

ABSTRACT:
The device has an SCR structure in a P surface zone of a silicon die. A P+ anode region for connection to an I/O terminal to be protected is formed in an N region, as well as an N+ contact region; an N+ cathode region is formed in another N region for connection to the earth of the integrated circuit. The striking potential of the SCR, that is, the intervention potential of the protection device, is determined by the reverse breakdown of the junction between the first N region and the P-body surface zone. This potential is influenced by an electrode which is disposed over the junction and is connected to the cathode constituting the gate of a cut-off N-channel MOS transistor. The concentrations are selected in a manner such that the P-channel MOS transistor defined by the P region, by the portion of the first region over which the electrode is disposed, and by the P-body, has a conduction threshold greater than the striking potential. The device can be integrated in a very small area and is very efficient in terms of both energy and response speed.

REFERENCES:
patent: 4400711 (1983-08-01), Avery
patent: 5182220 (1993-01-01), Ker et al.
patent: 5225702 (1993-07-01), Chatterjee
patent: 5272097 (1993-12-01), Shiota
patent: 5455436 (1995-10-01), Cheng
Chatterjee, A. et al., "A Low-Voltage Triggering SCR for On-Chip ESD Protection at Output and Input Pads", EEE Electron Device Letters 12:1, 21-22 (1991).

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