Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Reexamination Certificate
1999-04-19
2001-07-24
Smith, Matthew (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
C257S355000, C257S357000, C257S173000, C257S678000, C257S360000
Reexamination Certificate
active
06265756
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates to integrated circuits, and in particular to an electrostatic discharge protection device.
BACKGROUND OF THE INVENTION
The potential for electrostatic discharge to cause damage to integrated circuits is well known. Electrostatic discharge may occur at various stages in the assembly and testing of a chip package, and may be generated by a variety of sources. To prevent damage to the chip, electrostatic discharge (ESD) protection devices must be built into the chip to dissipate ESD voltage/current spikes.
Existing ESD protection devices typically comprise a shunt connected between each input/output (I/O) line and ground and/or a power supply. These devices frequently contribute an undesirable level of parasitic capacitance to the I/O lines. This capacitance can adversely affect circuit performance, particularly in the field of radio frequency (RF) circuits.
SUMMARY OF THE INVENTION
Therefore, a need has arisen for an electrostatic discharge protection device that addresses the disadvantages and deficiencies of the prior art. In particular, a need has arisen for an electrostatic discharge protection device with reduced parasitic capacitance.
Accordingly, an electrostatic discharge protection device for reducing electrostatic discharge spikes on a signal line is disclosed. In one embodiment, the electrostatic discharge protection device includes first and second contact regions formed in a semiconductor material such as a compound semiconductor substrate. A first terminal is electrically coupled between the signal line and the first contact region. A second terminal is electrically coupled between the second contact region and a sink such as ground. An isolation region is formed in the semiconductor material between the first and second contact regions. In one embodiment, the isolation region is an implant-damaged region of the semiconductor material.
In another aspect of the present invention, a method for fabricating an electrostatic discharge protection device is provided. The method entails forming first and second contact regions in a semiconductor material, forming an isolation region in the semiconductor material between the first and second contact regions, forming a first electrical contact on the first contact region, and forming a second electrical contact on the second contact region.
An advantage of the present invention is that the electrostatic discharge protection device provides protection against electrostatic discharges for integrated circuit components. Another advantage of the present invention is that the electrostatic discharge protection device adds only a small amount of parasitic capacitance to I/O lines, which is particularly important in RF signal processing circuitry.
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Bingham Steven D.
Brockett Steven W.
Criss Dennis A.
Mickanin Wesley C.
Anya Igwe U.
Ogonowsky Brian D.
Skjerven Morrill & MacPherson LLP
Smith Matthew
Stewart Daniel P.
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