Electrostatic discharge protection circuits including circumfere

Details Electrostatic discharge protection circuits including circumfere Electrostatic discharge protection circuits including circumfere

1998-01-05

1999-11-16

Gaffin, Jeffrey

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361111, 361127, H02H 900

Patent

active

059868635

ABSTRACT:
Electrostatic discharge (ESD) protection circuits include first and second pads on an integrated circuit and first and second well regions in the integrated circuit substrate. The first and second well regions include respective first and second circumferences or walls. First and second diodes are included in the respective first and second well regions. The first and second diodes are serially connected between the first and second pads. A first guard ring is included adjacent the first circumference, and preferably in the first well. The first diode is included within the first guard ring. A second guard ring is also preferably included adjacent the second circumference, and most preferably in the second well. The second diode is included within the second guard ring. The first and second well regions preferably are of first conductivity type, and the ESD protection circuit further includes a third well region of second conductivity type in the integrated circuit substrate, between the first and second well regions. The first and second guard rings are of the first conductivity type at higher concentration than the first and second well regions.

REFERENCES:
patent: 4757363 (1988-07-01), Bohm et al.
patent: 5329143 (1994-07-01), Chan et al.
patent: 5637900 (1997-06-01), Ker et al.

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