Electrostatic discharge protection circuit and method

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257328, 257356, 257357, 257360, 361 56, H01L 2972

Patent

active

060376368

ABSTRACT:
An electrostatic discharge (ESD) protection circuit for the output pads of an integrated circuit. The protection circuit includes an NMOS output transistor, an NMOS protection transistor and an NMOS bias transistor. The output and protection transistors are preferably embodied in a common merged transistor structure and have common drains connected to the output pad and common sources connected to the integrated circuit common. The bias transistor controls the gate-source bias of the protection circuit and operates to cause the output and the protection transistors to conduct current in proportion to the relative size of the transistors thereby maximizing the protection against damage by ESD.

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