Electrostatic discharge protection apparatus for...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C361S056000

Reexamination Certificate

active

07605431

ABSTRACT:
The present invention provides several embodiments with layout patterns for ESD protection. An apparatus with a layout pattern may be configured to protect I/O pads or the power rail. The layout pattern may designed to increase the current paths for ESD stress currents. For example, more rings may be applied. The present invention also provides circuit embodiments for ESD protection. According to one embodiment, an ESD protection circuit comprising four parasitic BJTs may be configured to protect the I/O pads or the power rail. More BJTs or resistors may be used to increase the current paths for ESD stress currents. Several variations and modifications may be made by changing the doping profiles of the doped regions.

REFERENCES:
patent: 6297536 (2001-10-01), Yu
patent: 6492208 (2002-12-01), Cheng et al.
patent: 6492859 (2002-12-01), Vashchenko et al.
patent: 7042028 (2006-05-01), Huang et al.
patent: 2002/0017654 (2002-02-01), Lee et al.

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