Electrostatic discharge (ESD) protection applying high...

Details Electrostatic discharge (ESD) protection applying high... Electrostatic discharge (ESD) protection applying high...

2011-04-05

2011-04-05

Hoang, Quoc D (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE29181

Reexamination Certificate

active

07919817

ABSTRACT:
An electrostatic discharge (ESD) protection circuit includes a triggering diode that includes a junction between a P-grade (PG) region and an N-well. The PG region has a dopant profile equivalent to a P-drain dopant profile of a PMOS transistor having a breakdown voltage represented by V whereby the triggering diode for conducting a current when a voltage greater than the breakdown voltage V is applied. In an exemplary embodiment, the dopant profile of the PG region includes two dopant implant profiles that include a shallow implant profile with a higher dopant concentration and a deep implant profile with a lower dopant concentration.

REFERENCES:
patent: 5602404 (1997-02-01), Chen et al.
patent: 5856214 (1999-01-01), Yu
patent: 2002/0145163 (2002-10-01), Pan
patent: 2004/0016992 (2004-01-01), Mallikarjunaswamy
patent: 2004/0027743 (2004-02-01), Higashi et al.

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