Electricity: electrical systems and devices – Electric charge generating or conducting means – Use of forces of electric charge or field
Reexamination Certificate
2001-06-21
2002-12-31
Tso, Edward H. (Department: 2838)
Electricity: electrical systems and devices
Electric charge generating or conducting means
Use of forces of electric charge or field
Reexamination Certificate
active
06501636
ABSTRACT:
This invention pertains generally to the processing of semiconductor wafers and, more particularly, to a clamp for holding workpieces with irregular surfaces.
Typically, workpieces are electrostatically clamped in order to hold them securely and in some cases to facilitate heat transfer between the workpiece and the clamping structure. Such conventional electrostatic clamping structures have flat or smooth curved surfaces conforming to the shape of some part of a workpiece. Typically the surface of such a clamp is hard or firm so that a bumpy surface with irregularities greater than a certain size which were not highly compressible would prevent conformal contact between workpiece and electrostatic clamping structure. Thus interfering with efficient heat transfer between workpiece and clamping structure. The wafers, whether silicon or other materials, on which integrated circuits are fabricated are currently hundreds of microns in thickness. The portable electronic devices (such as cellular phones and smart cards) which use an increasing fraction of semiconductors require that the packaged integrated circuit chips (IC chips or IC's) be of the same order of thickness or less than that of the original wafer. In order to accomplish such IC packaging these wafers are increasingly being thinned from the backside after the circuits are manufactured on the front side. Such wafer thinning almost always involves grinding away (the most economic method for removing a large amount of wafer material) a good fraction of the wafer material on the back-side thus leaving it reduced in thickness. Such grinding, however, leaves IC's which have scratches in their back sides, which weaken them. Such scratches are almost always confined to a layer of material within a few tens of microns of the surface left by the grinding. When such chips are mounted to a wiring board to make electronic products the stresses associated with the flexing of the board, or the thermal expansion of the board (when the IC's are in operation and producing heat) can cause the semiconductor material to break. However, if the wafer material within the scratched and damaged layer is removed by a soft etching method then the strength of the wafer material is restored somewhat and the failure rate of the packaged IC's is much reduced.
The most economical and safest methods for accomplishing this soft etching of the wafer material are dry etching methods, of which there are many. In many such dry etching methods it is possible to accelerate the rate of etching to levels which make removal of tens of microns of material economic but for all of these it involves generation of substantial amounts of heat on the wafer surface. This heat then needs to be removed in order that the wafer temperature be limited to values which do not melt the solder balls which had been mounted on the device side of the wafer.
Removing such process heat from the device side of the wafers with their attached solder balls is not an easy thing to accomplish. It may be done by use of flowing air or gas at pressures of tens of Torr or higher. However, some of the most efficient etching technologies involve plasmas for producing the etching where the gas pressure for the process is less than or of the order of several Torr. In this case the gas cooling of the wafer is not practical. Further complicating the cooling of such wafers is the fact that it is essential to protect the device side of the wafer where the solder balls are mounted so that no damage to the exposed IC's is caused by handling such wafers. Such handling includes transporting the wafers into and out of the grinding and etching systems and mounting wafers during both grinding and etching operations. Protecting such vulnerable wafers is usually done with a plastic polymer tape applied to the device side of the wafer whereon the solder balls are mounted. Such tape covers the whole of the device side and is typically between 70 microns and 120 microns in thickness. The layer of adhesive which holds the tape to the wafer is typically of the order of ten microns to a few tens of microns thick. Since the solder balls themselves are often 50 microns to more than 100 microns in height and the plastic tape is only moderately resilient the exposed surface of the tape after covering the wafer is still a little “bumpy”. The solder balls simply do not “sink into” the tape enough to produce a smooth and level exposed surface by which to handle and clamp the wafer. Typical electrostatic wafer clamping on the taped side of such wafers will not even make effective thermal contact with the raised areas of the plastic tape corresponding to the “bumps”. In order to make such wafer clamping with significant pressure with a roughly 100 micron plasma tape intervening will require much higher clamping voltages than are typically employed. However, clamping in other areas will be ineffective for good heat transfer. Further, there will be stresses induced in the thin wafers by the difference in the clamping pressure at the solder balls and the areas adjacent to the balls which may cause the wafers to break.
In order to effectively and safely clamp such wafers to allow efficient heat transfer from wafer to pedestal it is necessary to use a new type of electrostatic clamp which applies roughly equal clamping pressure to wafer areas corresponding to the “bumps” as well as to other areas. This must be done in such a way that tens of thousands of such wafers can be clamped and then released from clamping without leakage of any adhesive or significant wear or damage to the resilient layers of the clamping structure, or electrical breakdown of any electrical insulating layer.
The basic monopolar electrostatic chuck typically employs a single dielectric insulating layer between a base which may be made electrically charged and a conducting workpiece which is to be held. A simple example of a monopolar chuck is shown in FIG.
1
. In this device, a wafer
101
is clamped to a pedestal
103
which may be electrically biased by voltage source
105
. A dielectric insulating layer
102
between conducting wafer and pedestal base
103
prevents much charge from flowing to the wafer from the biased pedestal base. An electrical grounding contact
104
serves to allow electric charge to flow to the clamped workpiece to compensate that on the pedestal base and thus confine the largest part of the electrical field to the region between the workpiece and the base. Such an insulating layer may be a multi-layer structure which consists of more than one dielectric. The layers included in this device were intended to be incompressible solid dielectric materials which were not substantially compressible. However, this device was not meant to hold bumpy workpieces.
It is in general an object of the invention to provide a new and improved electrostatic clamp for holding workpieces with irregular surfaces.
Another object of the invention is to provide an electrostatic clamp of the above character which overcomes the limitations and disadvantages of the prior art.
These and other objects are achieved in accordance with the invention by providing an electrostatic clamp structure having a pedestal in which the normal hard insulator surface facing the wafer for a conventional electrostatic clamp is replaced by resilient layer(s) adjacent to the wafer. In this structure the layer(s) adjacent to the wafer permit the “bumps” on the facing wafer surface to “sink into” the resilient layer of the chuck so that a substantial part of the bumpy wafer surface is in good thermal contact with the resilient layers. Such resilient layers are bonded to an underlying metal pedestal. These layers are adequate conductors of heat and are in good thermal contact with an underlying pedestal structure which may be actively cooled by conventional means.
REFERENCES:
patent: 4502094 (1985-02-01), Lewin et al.
patent: 5191506 (1993-03-01), Logan et al.
patent: 5986875 (1999-11-01), Donde et al.
patent: 6219219 (2001-04-01), Hausmann et al.
patent:
Savas Stephen Edward
Zajac John
Tso Edward H.
Wright Edward S.
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