Electricity: electrical systems and devices – Electric charge generating or conducting means – Use of forces of electric charge or field
Reexamination Certificate
1999-09-13
2001-06-19
Sherry, Michael J. (Department: 2836)
Electricity: electrical systems and devices
Electric charge generating or conducting means
Use of forces of electric charge or field
C200S181000, C438S666000
Reexamination Certificate
active
06249421
ABSTRACT:
BACKGROUND OF THE INVENTION
1.0 Field of the Invention
The present invention relates to a control system and, more particularly, to an electrostatic actuating control system that utilizes miniature silicon wafers and finds applications in fluid control systems and optical applications.
2.0 Description of the Prior Art
Microfabrication techniques employed in standard integrating circuit processing industry have lead to the fabrication of miniature devices, such as wafers formed of silicon.
Miniature devices because of their small dimensions and relatively light weight may be advantageously used in control systems, such as an electrostatic control system, that utilizes the movement of members to accomplish a control function. It is desired that an electrostatic actuating arrangement be provided that utilizes relatively small wafers to accomplish control functions and that find application in a fluid control system or in an optical application.
SUMMARY OF THE INVENTION
Accordingly, it is a primary object of the present invention to provide for an electrostatic actuating system that employs miniature wafers that are physically moved to accomplish a desired control operation.
It is another object of the present invention to provide means for ensuring that movable wafers are returned to their home position whenever moved therefrom.
It is yet another object of the present invention to provide for an electrostatic actuating control system that is responsive to high-frequency actuations.
In accordance with these and other objects, the present invention provides an electrostatic actuating system comprising at least first and second wafers and a first source of voltage. The first wafer as at least one hole in it and the second wafer has at least one post extending upward from one of its surfaces and which is dimensioned so as to be insertable into the at least one hole. The first and second wafers have faces that are arranged so that the post faces the hole. The first and second wafers have a layer of conductive material placed on one of their facing surfaces which serve as an electrode. The hole and the post are free of the conductive material. The source of voltage is applied across the electrodes of the first and second wafers.
REFERENCES:
patent: 4160141 (1979-07-01), Graf
patent: 4264798 (1981-04-01), Graf
patent: 5824204 (1998-10-01), Jerman
patent: 5880921 (1999-03-01), Tham et al.
patent: 5998292 (1999-12-01), Black et al.
Clohan, Jr. Paul S.
Huynh Kim
Sherry Michael J.
The United States of America as represented by the Secretary of
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