Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2001-12-12
2003-11-04
Le, Don (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S026000, C326S082000
Reexamination Certificate
active
06642741
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a termination method and apparatus for input/output (I/O) terminals on an integrated circuit (IC).
BACKGROUND OF THE INVENTION
High speed/high frequency signals are often transmitted via specially designed signal carrying cables and/or circuit board traces, referred to as transmission lines, to minimize loss, interference, and signal distortion. It is well known that such transmission lines have characteristic impedances (designated Z
0
). In order to minimize signal distortion due to reflections of the signal on the transmission line and to maximize power transfer through the transmission line, the output impedance of a transmission line driver and input impedance of a transmission line receiver must match the characteristic impedance of the transmission line to which they are connected. For example, one widely used coaxial cable (coax), designated RG-58, has a characteristic impedance of around 50 ohms. Thus, the input/output impedance of a coax receiver/driver circuit coupled to RG-58 coax should be 50 ohms.
Transmission lines are often coupled to transmission line drivers and/or receivers which are fabricated on an IC. On an IC, however, the absolute values of components cannot be controlled to relatively tight tolerances during fabrication. In addition, IC components have values which typically also vary with temperature, compounding the problem. Component value absolute tolerances of ±15% are typical. This means that any component designed and fabricated on the IC for terminating a transmission line having a characteristic impedance of Z
0
can have an absolute impedance of Z
0
±15%. The input impedance Z
in
of a transmission line receiver, and the output impedance Z
out
of a transmission line driver, however, may need a tolerance within ±1% for reasonable performance.
One known technique for controlling the I/O impedance of transmission lines connected to ICs is to use an external (i.e. off-chip) component to terminate each such connection. Use of an external component in this fashion will give an impedance tolerance which is as close as the tolerance of the external component. For the exemplary RG-58 coax, an external 1% 50 ohm resistor will provide an I/O termination impedance ±1%. However, this requires a separate external resistor, and an external resistor connecting pad, for each such connection. This, in turn, requires that the IC chip, which may be limited by the number of I/O pads available, include the additional pads for the external resistors. In addition, the module containing the IC chip must be specially designed to include the external resistors and connect them to the appropriate pads on the IC chip. Consequently, this is a relatively expensive solution.
A second known technique for controlling the I/O impedance of transmission line interface circuits in ICs is to perform a trim operation on the IC after fabrication, but before packaging. In this technique, an on-chip resistor is fabricated on the IC to provide the termination for the transmission line. This resistor is deliberately fabricated to have too low a resistance value. This is done by making the width of the resistor too wide. After the fabrication process, a piece of test equipment measures the actual value of the termination resistor (which can vary by ±15%). A laser wafer trim device is then used to trim the size of the resistor. As the resistor is trimmed in width, it becomes smaller, and the resistance increases. The test equipment trims the termination resistor until the resistance is the desired characteristic resistance of the transmission line.
This provides each transmission interface circuit with an accurate on-chip termination, but requires a laser trim step for each transmission line connection on each IC chip produced, and expensive laser trim test equipment. In addition, because the termination resistor is fabricated on-chip, it is subject to variation with temperature. To solve this problem, the process used to fabricate the termination resistor must be one which produces resistors with relatively low temperature coefficients. Also, the laser trim process may destroy the hermeticity of the IC passivation if it is not specifically designed for laser trimming. These requirements, however, may conflict with other process requirements for the IC. Thus few IC processes are available that allow laser trimming. Furthermore, the termination resistors must be physically placed on the IC chip so that it may be laser trimmed without adversely affecting adjacent components. This can require special placement, and unduly increase die size.
Another known technique is disclosed in U.S. Pat. No. 4,228,369, issued Oct. 14, 1980 to Anantha et al. In this patent, an electrically variable terminating resistor is fabricated on the IC to serve as a precision terminating resistor in the final load of a series of loads on the transmission line. However, electrically variable resistors introduce non-linearities in the signal due to the resistance changing with the signal voltage as well as the control voltage. In addition, electrically variable resistors have higher parasitic capacitances than many other integrated resistors, due to their fabrication in the bulk semiconductor.
An on-chip termination for connecting transmission lines to IC chips, which does not require a separate external pad and termination resistor for each such interface, nor expensive post-fabrication trimming for each chip, yet produces termination impedances with relatively tight absolute tolerances, low capacitances, and good linearity, is desirable.
SUMMARY OF THE INVENTION
In accordance with principles of the present invention, an integrated circuit includes a termination for a transmission line having a predetermined characteristic impedance. The termination includes a controllable impedance circuit, coupled to the transmission line. The controllable impedance circuit employs a multiplier to control the portion of the termination current or voltage fed back to the transmission line, thereby controlling the net impedance. A reference impedance, placed external to the integrated circuit, has an impedance related to the characteristic impedance of the transmission line. A control circuit is coupled between the reference impedance and the controllable impedance circuit, and conditions the controllable impedance circuit to have the characteristic impedance responsive to the reference impedance. Alternatively, other control means may be used to adjust the controllable impedance circuit to have the desired impedance.
REFERENCES:
patent: 5254883 (1993-10-01), Horowitz et al.
patent: 6288564 (2001-09-01), Hedberg
patent: 2001/0045843 (2001-11-01), Hernandez-Marti
patent: 2002/0053923 (2002-05-01), Kim et al.
Huard Richard J.
Knierim Daniel G.
Metz Arthur J.
Caracappa David N.
Le Don
Lenihan Thomas F.
Tektronix Inc.
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