Electronic tester for testing I.sub.ddq in an integrated circuit

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

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Details

324763, G01R 3126, G01R 3128

Patent

active

055193358

ABSTRACT:
An electronic tester, for testing I.sub.ddq in an integrated circuit chip, comprises: 1) a first power supply, having a large current capacity, which sends current to the chip through a first diode; 2) a second power supply, having a current sensor and a small current capacity which is substantially less than the large current capacity, which sends current to the chip through a second diode which is in parallel with the first diode; and 3) a control module which sends test vectors to the chip during a series of spaced apart T.sub.A time intervals, and sends control signals to at least one of the power supplies which indicate when the T.sub.A time intervals occur. In response to the control signals, the one power supply generates a first output voltage during the T.sub.A time intervals which forward biases said first diode and reverse biases said second diode; and it also generates a second output voltage between the T.sub.A time intervals which forward biases the second diode and reverse biases the first diode so long as the small current capacity is not exceeded.

REFERENCES:
patent: 5332973 (1994-07-01), Brown et al.
patent: 5371457 (1994-12-01), Lipp
patent: 5392293 (1995-02-01), Hsue

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