Electronic digital logic circuitry – Interface – Current driving
Patent
1996-11-14
1998-05-19
Santamauro, Jon
Electronic digital logic circuitry
Interface
Current driving
326 30, 326115, 327 53, H03K 190185, H03K 190948
Patent
active
057540608
ABSTRACT:
An electronic system such as a Single-Chip-Module (SCM), a Multi-Chip-Module (MCM), or a Board-Level-Product (BLP) includes a plurality of units which are interconnected by a terminated transmission bus line. Each unit includes a CMOS circuit, a terminated bus line for signal transmission, and a driver/receiver circuit which is spaced from the CMOS circuit on a substrate. A guard ring is formed around at least a part of the CMOS circuit which faces the driver/receiver circuit. The driver/receiver circuit includes a driver for receiving an input logic signal from the CMOS circuit and inducing a corresponding signal onto the bus line, and a receiver for receiving an output signal from the bus line and providing a corresponding output logic signal to the CMOS circuit. The receiver includes a receiver transistor having a gate electrically connected to the bus line and producing a current in relation to the received signal, a comparator for comparing a voltage level of the received signal to a reference voltage level and for splitting the current into a first path having a current inversely proportional to the received signal and a second path having a current in proportion to the received signal, an output section for providing the CMOS logic signal at a first logic state when the current in the first path is greater than the current in the second path, and for providing the CMOS logic signal at a second logic state when the current in the first path is less than the current in the second path.
REFERENCES:
patent: 4658157 (1987-04-01), McGowan
patent: 4739193 (1988-04-01), Doty, II
patent: 4859877 (1989-08-01), Cooperman et al.
patent: 4937476 (1990-06-01), Bazes
patent: 5023488 (1991-06-01), Gunning
patent: 5038058 (1991-08-01), Wang
patent: 5047671 (1991-09-01), Suthar et al.
patent: 5148056 (1992-09-01), Glass et al.
patent: 5164663 (1992-11-01), Alcorn
patent: 5408146 (1995-04-01), Nguyen et al.
patent: 5502400 (1996-03-01), Livolsi et al.
patent: 5548226 (1996-08-01), Takekuma et al.
patent: 5576642 (1996-11-01), Nguyen et al.
patent: 5594370 (1997-01-01), Nguyen et al.
Gunning et al., Jedec, "GTL: A Low Voltage Swing Transmission Line Transceiver," Mar. 15, 1991.
Chen, John Y., "CMOS Devices and Technology for VLSI," Prentice Hall, 1990, pp. 312-317.
Weste et al., "Principles of CMOS VLSI Design," Addison-Wesley, 1985, pp. 58-60, 109.
Nguyen et al., "A High Performance, Low Noise, Low Power, Backplane Driver Using 0.7 uM HCMOS Technology," May 19, 1990.
Nguyen Trung
Wong Anthony Yap
LandOfFree
Electronic system including high performance backplane driver/re does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electronic system including high performance backplane driver/re, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic system including high performance backplane driver/re will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1856261