Electronic parts packaging structure

Details Electronic parts packaging structure Electronic parts packaging structure

2006-07-14

2010-11-30

Phan, Thiem (Department: 3729)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

For plural devices

C257S686000, C257S692000, C257SE21503

Reexamination Certificate

active

07843059

ABSTRACT:
In an electronic parts packaging structure of the present invention constructed by stacking a plurality of sheet-like units in a thickness direction, each of the units includes a first insulating layer, wirings formed on one surface of the first insulating layer, a semiconductor chip (electronic parts) connected to the wirings, a second insulating layer formed on an one surface side of the first insulating layer to cover the semiconductor chip, and connecting portions (terminals and contact vias) for connecting electrically the wirings and wirings of other unit, wherein arrangement of the first insulating layer, the semiconductor chip, the wirings, and the second insulating layer is symmetrical between units adjacent in a thickness direction.

REFERENCES:
patent: 5939779 (1999-08-01), Kim
patent: 6469374 (2002-10-01), Imoto
patent: 7053475 (2006-05-01), Akagawa
patent: 2001/0004130 (2001-06-01), Higashi et al.
patent: 2005/0161833 (2005-07-01), Takeuchi et al.
patent: 2005/0184377 (2005-08-01), Takeuchi et al.
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patent: 2002-026250 (2002-01-01), None
patent: 2005-209689 (2005-08-01), None
patent: 2005-217225 (2005-08-01), None
Office Action in corresponding Japanese Patent Application No. 2005-373859 mailed on Apr. 27, 2010.

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