Electronic package with strengthened conductive pad

Details Electronic package with strengthened conductive pad Electronic package with strengthened conductive pad

2003-04-28

2004-11-09

Potter, Roy (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Configuration or pattern of bonds

C257S783000, C257S784000

Reexamination Certificate

active

06815837

ABSTRACT:

TECHNICAL FIELD
The present invention relates, in general, to electronic packages, one example being a chip carrier having a circuitized substrate for interconnecting a semiconductor chip to a printed circuit board. In particular, the invention relates to such circuitized substrate packages and the like for use in information handling systems (e.g., computers).
BACKGROUND OF THE INVENTION
Circuitized substrates, such as those used in electronic packages, have been and continue to be developed for many applications. Such a circuitized substrate usually includes a surface for redistributing electrical signals from the chip mounted on the circuitized substrate onto a larger circuitized area so that the circuitized substrate can properly interface with the hosting printed circuit board having said larger area.
With semiconductor chip input/output (I/O) counts increasing beyond the capability of peripheral lead devices and as the need for both semiconductor chip and printed circuit board miniaturization increases, area array interconnects will be the preferred method for making a large number of connections between an electronic package such as a chip carrier and a printed circuit board, For circuitized organic substrates, including chip carriers and printed circuit boards, it is known that the materials making up these substrates have some structural flexibility. All flexible materials have some limitations on the amount of mechanical strain which can be tolerated until the material fractures and fails. A measure of this is commonly known as ductility. During manufacture of an electronic package and its assembly to a printed circuit board, many sources of package substrate (laminate) and printed circuit board flexure or bending exist. Sources include manual handling through assembly, placing the printed circuit board into tooling fixtures, assembling other components onto the printed circuit board, assembly of cables and hardware to the printed circuit board and use of pressure-probes for electrical testing. Furthermore, if the coefficient of thermal expansion (CTE) of the semiconductor chip, the package's laminate substrate, and the printed circuit board are substantially different from one another, temperature changes during operation of the electronic package can cause flexure or bending of the organic structures by different amounts. As a result, industry standard ball grid array (BGA) interconnections between the package and printed circuit board may be subject to high stress. These high stresses can be transmitted into the package and can potentially cause high strain on the package's materials beyond the limits of the material ductility, and cause package damage. Significant yield loss concerns during manufacturing, and reliability concerns during thermal cycling field operation may become manifest by failure (cracking or delamination) of dielectrics and circuitry on or within the chip carrier or even failure of the integrity of the semiconductor chip (chip cracking) caused by high stress during manufacturing and field operation. These concerns significantly inhibit design flexibility. For example, semiconductor chip sizes may be limited or interconnect sizes, shapes and spacing may have to be customized outside or beyond industry standards to reduce these stresses. These limitations may limit the electrical performance advantages of the electronic package and/or add significant cost to the electronic package.
One particular yield and reliability concern is that of the circuitized substrate's external conductive layer, which is used to electrically bond the package to the printed circuit board, with the aforementioned solder ball grid array. This layer may be susceptible to stresses transmitted from the printed circuit through the BGA solder ball interconnections from handling or thermal cycling of the electronic package. If the layer (and an accompanying solder mask layer if utilized) cannot accommodate the stresses, then it is susceptible to deterioration, such as cracking or partial separation, which can cause failure of the formed connection (and the electronic package). Even worse, such failure may also cause failure of the information handling system utilizing the package. By the term information handling system as used herein is meant any instrumentality or aggregate of instrumentalities primarily designed to computer, classify, process, transmit, receive, retrieve, originate, switch, store, display, manifest, measure, detect, record, reproduce, handle or utilize any form of information, intelligence or data for business, scientific, control or other purposes. Examples include personal computers and larger processors such as servers, mainframes, etc.
High stresses transmitted to the upper layer(s) of such a package substrate will typically occur at the edges of the BGA interconnection pads and will be highest at the edges of the BGA interconnection pads under the rows of BGA solder ball interconnections at or near a corner of the package's usually rectangular substrate. To a lesser extent, high stresses transmitted to this layer can also occur at the edges of the BGA interconnection pads under the rows of BGA solder ball interconnections at or near the non corner edges of the chip carrier. Cracks in or separation of the conductive layer caused by the flexure, described above, generally initiate in these areas of highest stress. Solutions to this problem which limit or reduce the amount of printed circuit board flexure can be impractical and overly restrictive.
Thus, it is desirable to have an electronic package with a laminate, circuitized substrate that substantially inhibits or prevents separation and/or cracking of the external circuit pattern during flexure of the package caused by assembly, handling or operation. The package (and system) defined herein will have improved yield and increased field life operation, and thus represent an advancement in the art.
OBJECTS AND SUMMARY OF THE INVENTION
Accordingly, it is the object of this invention to enhance the art of electronic packaging and of information handling systems utilizing same.
It is another object of the invention to provide an electronic package that includes a circuitized substrate that can be manufactured in such a manner that substantially inhibits or prevents cracking or separation of a circuit pattern (e.g., pad) positioned on the surface of the package's circuitized substrate, has increased yields, and can be produced at relatively competitive costs compared to many current products.
It is still another object of the invention to provide an information handling system utilizing such an electronic package mounted on a suitable substrate such as a printed circuit board which in turn is positioned in the system.
According to one aspect of the invention, there is provided an electronic package comprising a substrate having an external surface, an electrically conductive pad positioned on the external surface, and at least one electrically conductive layer positioned within the substrate and physically coupled to the electrically conductive pad, the at least one electrically conductive layer of a size sufficiently large enough to substantially prevent removal of the electrically conductive pad when the pad is subjected to a tensile pressure of at least about 1.4 grams per square mil.
According to another aspect of the invention, there is provided an information handling system comprising at least one printed circuit board including at least one electrically conductive receptor thereon, an electronic package including a substrate having an external surface, an electrically conductive pad positioned on the external surface, and at least one electrically conductive layer positioned within the substrate and physically coupled to the electrically conductive pad. The at least one electrically conductive layer is of a size sufficiently large enough to substantially prevent removal of the electrically conductive pad when the pad is subjected to a tensile pressure of at least about 1.4

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