Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
1998-02-04
2001-12-04
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S686000, C257S707000, C257S713000, C257S720000, C257S723000, C257S738000, C361S709000, C361S711000
Reexamination Certificate
active
06326696
ABSTRACT:
TECHNICAL FIELD
The invention relates to electronic packages and more particularly to such packages which utilize circuitized substrates and semiconductor devices (chips) as part thereof. Even more particularly, the invention relates to such electronic packages for use in the information handling systems (computer) field.
BACKGROUND OF THE INVENTION
Electronic packages which utilize semiconductor chips as part thereof are known in the computer industry, with examples being shown and described in U.S. Pat. No. 4,004,195 (Harayda et al.); U.S. Pat. No. 4,415,025 (Horvath); U.S. Pat. No. 4,593,342 (Lindsay); U.S. Pat. No. 4,914,551 (Anschel et al.); U.S. Pat. No. 4,962,416 (Jones et al.) and U.S. Pat. No. 5,278,724 (Angulas et al.). With particular attention to U.S. Pat. Nos. 4,593,342 and 4,914,551, the semiconductor chip is electrically coupled to a circuitized substrate which in turn is electrically coupled to a second substrate such as a printed circuit board (PCB). The semiconductor chip may be in turn, thermally connected to a separate heat sinking member to provide heat sinking for the heat generated by the chip during operation. These six patents are incorporated herein by reference.
It is understood that a main objective of those in the modern electronic packaging industry is to significantly increase the circuit densities and operating speeds of various elements (e.g. semiconductor chips and circuitized substrates) which form part of these packages. Mounting semiconductor chips in close proximity is known to improve operating speed by minimizing electrical resistive, inductive and capacitive loading effects on interconnections between the chips. Higher circuit densities, however, lead to a need for more interconnections requiring more space and finer interconnection geometries and therefore higher resistive and inductive effects. Such effects tend to limit operating speeds.
As defined herein, the electronic package of the present invention represents a structure particularly adapted for having high circuit density semiconductor devices and associated circuitized substrates as part thereof while providing high operating speeds. Further, the package is capable of being assembled in a relatively facile and inexpensive manner.
Even further, the structure as defined herein is adapted for accepting a variety of different semiconductor chip configurations and associated circuitized substrate structures, thus providing a much desired versatility for such a package. Even further, the invention as defined herein is readily adaptable to a variety of chip attach manufacturing processes (e.g., wire, thermocompression and/or thermosonic bonding, soldering, etc.).
It is believed that an electronic package possessing the features mentioned above, and others discernable from the teaching provided herein, represents a significant advancement in the electronic packaging field. It is also believed that a new and unique method for making such a package would constitute a valuable contribution to this field.
DISCLOSURE OF THE INVENTION
It is, therefore, a primary object of the invention to enhance the art of electronic packaging by providing an electronic package possessing the several advantageous features defined herein.
It is another object of the invention to provide a method of making such an electronic package.
In accordance with one aspect of the invention, there is defined an electronic package which comprises a circuitized substrate having a cavity therein, electrically conductive members positioned on a surface of the substrate with some of these conductive members located about the periphery of the cavity, a first semiconductor chip positioned within the cavity and electrically coupled to some of the conductive members, and a second semiconductor chip positioned on the first chip and electrically coupled to it.
In accordance with another aspect of the invention, there is provided a method for making an electronic package which comprises the steps of providing a circuitized substrate including a first surface, forming a cavity within the circuitized substrate, positioning a plurality of electrically conductive members on the first surface of the circuitized substrate with at least some of the conductive members located about the periphery of the cavity, positioning a first semiconductor chip substantially within the cavity, electrically coupling the first semiconductor chip to at least some of the conductive members located about the periphery of the cavity, positioning a second semiconductor chip on the first semiconductor chip, and electrically coupling the second semiconductor chip to the first semiconductor chip.
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Horton Raymond Robert
Lanzetta Alphonso Philip
Milewski Joseph Maryan
Mok Lawrence S.
Montoye Robert Kevin
Chambliss Alonzo
Chaudhuri Olik
International Business Machines - Corporation
Pivnichny John R.
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