Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-11-07
2006-11-07
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C713S300000, C326S021000
Reexamination Certificate
active
07133956
ABSTRACT:
The CPU of an electronic device generates a parameter for determining the amplitude of a serial data signal when it is output from an output device to a serial ATA bus. The parameter indicates a value that is needed to make the amplitude of the received serial data signal fall within a range, stipulated in serial ATA interface standards, when another electronic device receives the serial data signal. The parameter is generated in accordance with the cable length of the serial ATA bus designated by a cable length designation unit. The other electronic device is connected to the serial ATA bus.
REFERENCES:
patent: 3786354 (1974-01-01), Lasky
patent: 4413240 (1983-11-01), Dyke
patent: 5838726 (1998-11-01), Nemoto et al.
patent: 2005/0024083 (2005-02-01), Kitamura et al.
patent: 2000-341177 (2000-12-01), None
Handa Takuya
Igari Fubito
Watanabe Akihiro
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