Electronic device pad relocation, precision placement, and packa

Details Electronic device pad relocation, precision placement, and packa Electronic device pad relocation, precision placement, and packa

1998-01-02

1999-03-30

Picardat, Kevin M.

Semiconductor device manufacturing: process

Semiconductor substrate dicing

Having specified scribe region structure

438460, H01L 21301

Patent

active

058888845

ABSTRACT:
Top die pads are electrically relocated by forming holes through a semiconductor wafer between device active regions. An electrically insulating layer is formed over all exposed surfaces of the wafer, including within the holes, and openings are made in the insulating layer for access to the top interconnection pads. The wafer and holes are metallized and patterned to form bottom interconnection pads electrically connected to corresponding top interconnection pads by metallization extending within the holes. A dicing saw having a kerf width less than the diameter of the holes is employed to separate the individual devices. For accurate position alignment of repatterned die, an alignment structure, such as projecting pins or an egg crate structure, engages the die, and alignment pads can be patterned on the die.

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