Static information storage and retrieval – Read/write circuit – Accelerating charge or discharge
Reexamination Certificate
2011-05-10
2011-05-10
Nguyen, Viet Q (Department: 2827)
Static information storage and retrieval
Read/write circuit
Accelerating charge or discharge
C365S185250, C365S185130, C365S185170
Reexamination Certificate
active
07940590
ABSTRACT:
A device with non volatile memory cells, with optimized programming, of the type comprising a sector of matrix memory cells organized in rows and columns, with the columns organized in a plurality of global bit-lines associated with at least one plurality of local bit-lines and respectively enabled by a first select signal and by at least one second select signal generated by a decoder, these columns being associated with at least one program load PL controlled by a logic circuit and suitable for applying a programming pulse to a plurality of cells belonging to the enabled bit-lines, comprising a plurality of discharge transistors, each associated with a corresponding column controlled by a control signal complementary to the control signal of the adjacent discharge transistor.
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Garofalo Pierguido
Martinelli Andrea
Mirichigni Graziano
Nguyen Viet Q
Trop Pruner & Hu P.C.
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