Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
1999-12-08
2002-04-16
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S086000
Reexamination Certificate
active
06373275
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a transmission technique for an electronic device, and, particularly to a technique which is effectively applied to a chip input/output circuit system, which combines a driver circuit with a bus wiring system comprising a transmission line and a termination circuit matched with the line.
BACKGROUND OF THE INVENTION
For example, a circuit structure as shown in
FIG. 17
, which shows a main part of an input/output circuit forming part of an electronic device, is considered to be a conventional technique which the present inventor has discussed in relation to a chip input/output circuit system. This input/output circuit comprises a differential driver
101
which converts an inputted digital signal into a complementary signal and transmits the signal; a differential receiver
102
which receives the complementary digital signal and outputs a digital signal corresponding to the inputted digital signal; and paired signal wires
103
which connect the differential driver
101
with the differential receiver
102
. This circuit is arranged in order to transmit the complementary digital signal outputted from the differential driver
101
to the differential receiver
102
.
In the input/output circuit of this electronic device, the differential driver
101
and the differential receiver
102
respectively comprise drivers
104
and
106
, and inverters
105
and
107
, each of which has a CMOS circuit structure comprising a pMOS transistor and an nMOS transistor. This structure operates complementarily, so that one of the transistors is turned on and the other is turned off when an inputted digital signal shifts from a low level to a high level, or from a high level to a low level. When an inputted digital signal thus shifts, by supplying complementary signal energy to the paired signal wires
103
from the differential driver
101
a
a complementary digital signal is transmitted to the differential receiver
102
through the paired signal wires
103
.
SUMMARY OF THE INVENTION
Meanwhile, the following has been revealed as a result of studies by the present inventors with respect to an electronic device as described above. For example, if the paired signal wires in the electronic device described above are parallel wires having an equal length, which has a coupling coefficient close to
1
, the paired signal wires can be structured as a transmission line whose electromagnetic field is substantially closed, and the complementary digital signal is transmitted in a mode (sub-TEM) close to TEM (Transversed Electromagnetic Mode) transmission so that the signal can be handled at high speed. This transmission line is one examples of a measure for transmitting a signal with high speed.
For example, suppose that a bus for exchanging signals in an electronic device is a transmission line. When a driver which supplies a signal sends a high-energy signal (which is a signal in a high state) to the bus, energy is required to raise the entire bus wire set at a ground level (which is a state of a low level) to a high level. This operation must be done before the driver transmits the signal to a receiver, if the signal rises at high speed.
Therefore, in the case where the rising time of a signal comes after the time required for supplying energy to the entire bus wire (which is the transmission delay time of the bus wires), energy supply from the driver is performed substantially in parallel to both the bus and the receiver, and there is almost no possibility that the receiver side can become aware of the existence of the bus. That is, this kind of serial work is a phenomenon which must be taken into consideration when the signal rising time is faster than the delay time of the bus wire. Naturally, it is the same with the opposite case of a transition to a low level, and such an operation to release the energy of the bus wire in a high-energy state is first required.
This kind of driver design need only enough energy to charge the load to the receiver when the rising of a signal is slower than the delay time of a bus. However, since an ordinary standard system now uses a high-speed signal, which has a shorter signal rising time than the delay time of a bus transmission line, it is more important to design how the energy should be supplied to the bus than to consider the characteristics of the receiver.
For example, an excellent receiver can sufficiently sense very weak signal energy and can change the state of the receiver itself, but does not consume the electric energy of signals. That is, an excellent receiver has a high direct-current resistance, for example, 1 K&OHgr;. In contrast, a bus transmission line has a characteristic impedance of 25 to 200&OHgr; and consumes energy which is greater by 1 or 2 digits than the receiver of the bus.
In this respect, the transmission time is 1.5 ns in the case where the length of a bus wire is set to 30 cm and the signal transmission speed is set to 2×10
8
m/s. Regardless of the position of the branch of the receiver, the period in which the signal flows through the entire length of the transmission line, for example, the period of 1.5 ns is a time for supplying the bus with energy. The driver must keep supplying energy during this period. Thus, the driver must have the ability to take the characteristic impedance as a load.
For example, in
FIG. 18
, which shows an equivalent circuit after a transition start of a signal immediately before the end of transmission of the signal to the termination end of a bus, if a differential driver
112
is connected to the start end of a transmission line
111
, the bus must keep flowing a current during the period of 1.5 ns in the equivalent circuit shown in FIG.
18
. In this respect, where the differential driver
112
has an internal resistance of 50&OHgr;, a load resistance of 50&OHgr;, and a Vdd voltage of 0.5 V, the resistance must be 50&OHgr; at 5 mA. From this value, the differential driver can be regarded as having a large drive ability. In this equivalent circuit, it is considered that the signal recognizes a termination end resistance from the instance when signal energy reaches a termination end, and the energy charge to the transmission line
111
is finished. Therefore, the load resistance
113
which is equivalent to the characteristic impedance of the transmission line
111
, disappears, and the equivalent circuit then becomes as shown in FIG.
19
.
In
FIG. 19
, suppose that the termination end resistor
114
now has a resistance of 50&OHgr;, matched with the characteristic impedance of the bus, depending on the transmission line
111
. Then, all of the energy is absorbed by this termination end resistor
114
and is discharged as a heat. As a result, no reflected energy returns. Even if a disturbance is caused due to a small parasitic element such as a branch or the like, no multiple reflection is prevented by the absorption described above. However, since the termination end resistor
114
is equal to the characteristic impedance of the bus, the differential driver
112
must keep current flowing of 5 mA as long as the high state continues. Therefore, the differential driver
112
which drives the transmission line
111
, should desirably be a current switch circuit.
In addition, since the energy absorption by the termination end resistor
114
increases the electric power consumption of the bus wiring system, as a result, the energy absorption amount must be reduced. That is, in order to reduce the drive ability of the differential driver
112
, a direct current resistance must be inserted so that the voltage is reduced. For example, if the voltage sensitivity of a differential receiver is increased, 50 mV or so can be achieved at the most. A current circuit or a differential circuit can be said to be a preferable driver. In principal, the signal amplitude can be reduced to as small as possible. This kind of bus structure is an ideal structure for a high-speed transmission line.
The present invention hence takes into consideration a
Otsuka Kanji
Usami Tamotsu
Cho James H.
Otsuka Kanji
Tokar Michael
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