Electronic device and address space expansion method

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses

Reexamination Certificate

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C711S202000

Reexamination Certificate

active

08074050

ABSTRACT:
An address space expansion method implemented by the electronic device which includes a storage unit, wherein the storage unit includes a first storage unit and a second storage unit, comprising: responding to the user operation to generate a target address; determining whether a address range of the target address is less than or equal to a predetermined address range, and generating a corresponding control signal; enabling the first storage unit or the second storage unit according to the generated corresponding control signal; acquiring a physical address corresponding to the target address and providing the physical address to the enabled storage unit according to the corresponding control signal and a predetermined converting rule; accessing and performing a reading/writing operation for data corresponding to the physical address of the enabled storage unit.

REFERENCES:
patent: 6938103 (2005-08-01), Azzarito et al.
patent: 2002/0156977 (2002-10-01), Derrick et al.
patent: 2005/0246506 (2005-11-01), Ukai

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