Electronic device

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S030000, C326S047000, C326S082000, C326S086000, C326S101000, C326S102000, C326S103000

Reexamination Certificate

active

06812742

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an electronic device having a transmission circuit transmitting a digital signal output by a driver to a transmission channel, and more particularly to technology for performing high-speed transmission in the GHz and higher bands.
2. Description of the Related Art
Recently, a clock frequency for operating an IC chip made according to the LSI technology reaches 2 GHz. On the other hand, the frequency of a transmission channel (bus) for transmitting/receiving a signal to/from the IC chip is, at the maximum, no more than 500 MHz, approximately. Thus, the bandwidth for transmitting/receiving the signal is extremely low compared with the operating frequency of the IC chip. Accordingly, the current status is that the I/O bandwidth for transmitting/receiving the signal to/from the IC chip is lacking. For this reason, a cache memory is provided to the IC chip such as a logic chip or a memory chip so as to assure high-speed signal processing inside the IC chip, and at the same time to compensate the lack of the bandwidth of the transmission channel.
However, by mounting the cache memory to the IC chip, not only a wide chip area is required but also additional address calculation of the cache memory is required. Thus, the architecture becomes complex. If an I/O bandwidth matching the operation clock of the IC chip can be secured, since the cache memory is not required, a system having a simple architecture can be achieved. A basic configuration of a digital system is that the number of I/Os of the IC chip should be essentially the same as the number of processing bits inside the chip. Thus, in order to match the bandwidth with the operation clock frequency, the operation clock of the IC chip and the clock (bus clock) of the transmission channel connected to the I/O must have the same frequency. In the days ahead of running in the age of the GHz band, there is an urgent need to improve the signal transmission connecting between the chips. The signal transmission in the GHz band can be realized by not only by providing a transmission channel that can operate in the GHz band, but also by a configuration in which a whole system including components such as a driver and receiver connected to the transmission channel can transmit a high-speed signal.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide an improved and useful electronic device in which the above-mentioned problems are eliminated.
It is another and more specific object of the present invention to provide an electronic device capable of performing high-speed transmission in the GHz and higher bands.
In order to achieve the above-described objects, according to one aspect of the present invention, there is provided an electronic device having a current switch type driver including a differential circuit that supplies a current to a transmission channel according to a signal, wherein a signal wire transmitting the signal to the differential circuit has a transmission channel structure.
According to the above-mentioned aspect of the present invention, the signal wire has a transmission channel structure. Thus, it is possible to decrease parasitic inductance and parasitic capacitance to a negligible level. Hence, it is possible to provide an electronic device capable of performing high-speed transmission in the GHz and higher bands.
In addition, it should be noted that the electronic device includes, for example, a single IC chip, a packaged IC chip, and an electronic device in which an IC chip and a packaged electronic device are mounted on a wiring board and connected by a transmission channel.
Other objects, features and advantages of the present invention will become more apparent from the following detailed description when read in conjunction with the following drawings.


REFERENCES:
patent: 5214318 (1993-05-01), Nakanishi et al.
patent: 6522173 (2003-02-01), Otsuka
patent: 6570463 (2003-05-01), Nedachi
patent: 11284126 (1999-10-01), None
patent: 2000174505 (2000-06-01), None
patent: 2001211211 (2001-08-01), None

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