Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2011-08-30
2011-08-30
Chaudry, M. Mujtaba K (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C365S158000
Reexamination Certificate
active
08010872
ABSTRACT:
The invention improves safety of an electronic controller using a nonvolatile memory MRAM able to easily perform reading and writing operations at high speed. Therefore, MRAM for writing a control program from an external tool has a correction code adding writing circuit, a decoding reading-out circuit, and error registers for writing an error generating address number thereto as error data. When the error generating address is designated and confirmation reading-out is performed and an error is generated as before, an overlapping abnormality judgment is made and abnormality notification is performed. A program memory area of MRAM is normally in a writing inhibition state. When the external tool is connected, the inhibition state is released. The error registers are arranged in a data memory area set to no writing inhibition object.
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Hashimoto Koji
Nakamoto Katsuya
Suzuki Shinsuke
Tsunekazu Shoso
Chaudry M. Mujtaba K
Mitsubishi Electric Corporation
Sughrue & Mion, PLLC
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