Electronic component having exposed surfaces

Details Electronic component having exposed surfaces Electronic component having exposed surfaces

2006-03-21

2010-02-16

Le, Thao X (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

C257S692000, C257S707000, C257S712000, C257SE23104

Reexamination Certificate

active

07663212

ABSTRACT:
An electronic component includes at least one vertical MOSFET device, a leadframe and a contact clip. A source electrode and gate electrode are provided on a lower surface of the MOSFET device and are mounted on a source portion and a gate portion, respectively, of the leadframe. The contact clip is electrically connected between the drain electrode, which is positioned on the upper surface of MOSFET device, and a drain portion of the leadframe.

REFERENCES:
patent: 5081067 (1992-01-01), Shimizu et al.
patent: 5582990 (1996-12-01), Bergstrom et al.
patent: 6133634 (2000-10-01), Joshi
patent: 6459147 (2002-10-01), Crowley et al.
patent: 6465875 (2002-10-01), Connah et al.
patent: 6476481 (2002-11-01), Woodworth et al.
patent: 6624522 (2003-09-01), Standing et al.
patent: 6646329 (2003-11-01), Estacio et al.
patent: 6767820 (2004-07-01), Standing et al.
patent: 6774466 (2004-08-01), Kajiwara et al.
patent: 6777800 (2004-08-01), Madrid et al.
patent: 6841865 (2005-01-01), Standing
patent: 6861286 (2005-03-01), Estacio et al.
patent: 6870254 (2005-03-01), Estacio et al.
patent: D503691 (2005-04-01), Standing et al.
patent: 6890845 (2005-05-01), Standing et al.
patent: 6891256 (2005-05-01), Joshi et al.
patent: 6893901 (2005-05-01), Madrid
patent: 6930397 (2005-08-01), Standing et al.
patent: 2001/0052641 (2001-12-01), Kuo et al.
patent: 2002/0158345 (2002-10-01), Hedler et al.
patent: 2002/0125550 (2002-12-01), Estacio
patent: 2003/0001247 (2003-01-01), Standing
patent: 2003/0019080 (2003-01-01), Anthony et al.
patent: 2003/0052408 (2003-03-01), Quinones et al.
patent: 2004/0026796 (2004-02-01), Standing et al.
patent: 2005/0224960 (2005-10-01), Standing et al.
patent: 2006/0017174 (2006-01-01), Otremba
patent: 101 22 191 (2002-08-01), None
patent: 102 49 206 (2004-07-01), None
patent: 10 2004 030 042 (2006-01-01), None
patent: WO 2004/038797 (2004-05-01), None
Sawle, Andrew et al.; Novel Power MOSFET Packaging Technology Doubles Power Density in Synchronous Buck Converters for Next Generation Microprocessors; International Rectifier; IEEE; 6 Pgs., 2002.

Affiliated with

Also associated with

Rating

Electronic component having exposed surfaces does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Electronic component having exposed surfaces, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic component having exposed surfaces will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4159055