Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With stress relief
Reexamination Certificate
2006-05-23
2006-05-23
Le, Thao P. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With stress relief
C438S198000, C257S778000
Reexamination Certificate
active
07049686
ABSTRACT:
A semiconductor device with its package size close to its chip size has a stress absorbing layer, allows a patterned flexible substrate to be omitted, and allows a plurality of components to be fabricated simultaneously. There is: a step of forming electrodes (12) on a wafer (10); a step of providing a resin layer (14) as a stress relieving layer on the wafer (10), avoiding the electrodes (12); a step of forming a chromium layer (16) as wiring from electrodes (12) over the resin layer (14); a step of forming solder balls as external electrodes on the chromium layer (16) over the resin layer (14); and a step of cutting the wafer (10) into individual semiconductor chips; in the steps of forming the chromium layer (16) and solder balls, metal thin film fabrication technology is used during the wafer process.
REFERENCES:
patent: 4076575 (1978-02-01), Chang
patent: 4698125 (1987-10-01), Rhodes
patent: 4917466 (1990-04-01), Nakamura et al.
patent: 4948754 (1990-08-01), Kondo et al.
patent: 5010389 (1991-04-01), Gansauge et al.
patent: 5171711 (1992-12-01), Tobimatsu
patent: 5180691 (1993-01-01), Adachi et al.
patent: 5498572 (1996-03-01), Shiga et al.
patent: 5614765 (1997-03-01), Avanzino et al.
patent: 5641113 (1997-06-01), Somaki et al.
patent: 5659952 (1997-08-01), Kovac et al.
patent: 5678287 (1997-10-01), Smith et al.
patent: 5744382 (1998-04-01), Kitayama
patent: 5773359 (1998-06-01), Mitchell et al.
patent: 5834844 (1998-11-01), Akagawa et al.
patent: 5960308 (1999-09-01), Akagawa et al.
patent: 5989939 (1999-11-01), Fjelstad
patent: 6049120 (2000-04-01), Otani et al.
patent: 1 030 357 (2000-08-01), None
patent: 52-8785 (1977-01-01), None
patent: A 63-72143 (1988-04-01), None
patent: 63-229839 (1988-09-01), None
patent: 64-1257 (1989-01-01), None
patent: A 64-1257 (1989-01-01), None
patent: 1-196856 (1989-08-01), None
patent: A 2-63127 (1990-03-01), None
patent: 2-109358 (1990-04-01), None
patent: 3-20041 (1991-01-01), None
patent: 3-198342 (1991-08-01), None
patent: A-3-198342 (1991-08-01), None
patent: 4-10429 (1992-01-01), None
patent: A 4-10429 (1992-01-01), None
patent: A-04-028231 (1992-01-01), None
patent: 4-74427 (1992-06-01), None
patent: 05-226416 (1993-09-01), None
patent: A 5-226416 (1993-09-01), None
patent: 05-291262 (1993-11-01), None
patent: A 5-291262 (1993-11-01), None
patent: 6-69211 (1994-03-01), None
patent: 6-77283 (1994-03-01), None
patent: A 6-77283 (1994-03-01), None
patent: A 7-297236 (1995-11-01), None
patent: A 8-102466 (1996-04-01), None
patent: 8-203906 (1996-08-01), None
patent: 8-250549 (1996-09-01), None
Le Thao P.
Seiko Epson Corporation
LandOfFree
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