Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated
Reexamination Certificate
2003-02-20
2004-09-21
Clark, S. V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Encapsulated
C257S666000, C438S123000, C438S124000
Reexamination Certificate
active
06794762
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a surface mounting type electronic component and a fabrication method thereof and, more particularly, to a structure of a resin molded electronic component with which electronic components each having outer diameter not larger than 1 mm are easily realized and a fabrication method of electronic components having the same structure.
2. Description of the Prior Art
A surface mounting type resin molded electronic component is usually fabricated by using a lead frame. That is, the lead frame having integrally formed island portions and lead portions is prepared, a semiconductor chip such as IC or LSI is mounted on each island portion and then electrodes of the semiconductor chip are electrically connected to the lead portions by bonding wires. Thereafter, main portions of the lead frame including the semiconductor chips thereon are sealed by encapsulation resin and unnecessary portions of the lead frame, which are exposed from the encapsulation resin, are cut away. An example of such electronic component is disclosed in JUS62-122349A. The example is shown in FIG.
1
. In
FIG. 1
, a semiconductor chip
3
is mounted on each island portion
1
of a lead frame. Electrode pads (not shown) of the semiconductor chip
3
are electrically connected to leads
2
by bonding wires
4
. An electronic component
6
includes the semiconductor chip
3
and the lead portions
2
coated with an encapsulation resin
5
. The electronic component
6
can be mounted on an upper surface of a support member (not shown) since the island portion
1
and the lead portions
2
are exposed in a plane coplanar with a lower surface of the encapsulation resin portion
5
, so that it contributes to the downsizing of electronic circuit device. In this structure of the electronic component
6
, there may be a case where, in the resin molding stage, the encapsulation resin portion
5
in molten state enters into a mounting surface of the island portion
1
and the lead portions
2
, resulting in a thin resin flash on the mounting surface side. In such case, the thin resin flash on the mounting surface side of the electronic component
6
becomes an obstacle when the surface mounting of the electronic component is performed. In order to remove the thin resin flash, a flexible resin film (not shown) is adhered to the lead frame and, after the resin capsulation is performed, the resin film is peeled off from the lead frame to prevent the resin flash from being formed on the mounting surfaces of the island portion and the lead portions.
On the other hand, further reduction of size and weight of a small electronic circuit device such as portable telephone set has been requested. In order to realize the further reduction of size and weight of the small electronic circuit device, further reduction of size and weight of an electronic component is necessary. In order to deal with such request of reduction of size and weight of the electronic component, it is necessary to downsize the semiconductor chip
3
itself and simultaneously to downsize the lead frame to thereby reduce outer size of the island portion
1
, width of the lead portion
2
and a distance between adjacent lead portions
2
. However, when the lead frame is made thinner, the mechanical strength thereof is lowered and the lead frame tends to be deformed by vibration and/or shock during transportation thereof. Therefore, there is a limit in downsizing an electronic component using a lead frame.
In view of this, JPH10-98133A discloses an electronic component having a structure in which electrodes connected to a semiconductor chip for connecting the latter to external terminals are directly exposed in an outer surface of an encapsulation resin portion covering the semiconductor chip. In this electronic component, the semiconductor chip and the electrodes for connection to external terminals are arranged on a supporting substrate and electrode pads of the semiconductor chip are electrically connected to the electrodes by bonding wires. Thereafter, an upper surface side of the supporting substrate is covered by the encapsulation resin portion and a rear surface of the semiconductor chip and the electrodes are exposed in a lower surface of the encapsulation resin portion by peeling off the supporting substrate from the hardened encapsulation resin portion.
Further, JP2002-16181A discloses another electronic component in which first metal layers and second metal layers are formed on a surface of a flexible metal substrate, semiconductor chips are mounted on the first metal layers and electrode pads of the semiconductor chips are electrically connected to the second metal layers by bonding wires. Thereafter, the metal substrate is covered by encapsulation resin and the first and second metal layers are exposed by peeling off the metal substrate from the encapsulation resin portion. Thereafter, individual electronic components are obtained by cutting the encapsulation resin portion suitably.
The electronic component disclosed in JPH10-98133A or JP2002-16181A does not require a lead frame, so that further downsizing of the electronic component is possible compared with the electronic component disclosed in JUS62-122349A.
Such surface mounting type electronic component is usually mounted by painting electrically conductive land portions on a printed circuit board with solder paste and electronic components are temporarily mounted thereon. And then, the printed circuit board is put in high temperature environment to melt the solder paste to thereby solder the electronic components to the conductive land portions. In this soldering step, the electronic components become in a floating state on melted solder. Therefore, if an amount of solder is excessive, the electronic components may be moved laterally before the solder is solidified, resulting in positional deviation of the electronic components. On the other hand, if the amount of solder is short, stress due to difference in thermal expansion coefficient in soldering interface is repeatedly applied to the interface by repetitive thermal expansion and thermal shrinkage thereof, resulting in that the soldering interface is cracked and, when the crack grows, the electrical connection may be lost. Therefore, it is necessary to regulate the amount of solder paste appropriately and to supply the electronic components onto the solder in such a manner that configuration of solder in melted state is not varied.
Since flat electrodes such as rear side electrodes and electrode pads of the electronic component disclosed in JPH10-98133A or JP2002-16181A or the first and second metal layers disclosed in JP2002-16181A are close to each other and exposed in the same plane as the surface of the encapsulation resin portion, there may be a short-circuit between flat electrodes by melted solder or, even if there is no short-circuit, the electrical connection may become degraded.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an electronic component comprising an electronic element fixed onto a first electrically conductive film electrically connected to at least one second electrically conductive film provided in substantially the same plane as that of the first conductive film, an encapsulation resin portion covering the fixing surface of the electronic element including peripheral portions of the first and second conductive films and electrically conductive protrusions formed in portions of the first and second conductive films, which are exposed in a lower surface of the encapsulation resin portion.
Another object of the present invention is to provide a fabrication method for fabricating electronic components, comprising the steps of forming fine holes in predetermined positions in one of major surfaces of a resin film, forming first electrically conductive films and second electrically conductive films in a plurality of regions including the predetermined positions of the resin film in which the fine holes are formed, f
Ikegami Gorou
Sugimoto Tomonobu
Clark S. V.
NEC Electronics Corporation
Young & Thompson
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