Electronic digital logic circuitry – Interface – Supply voltage level shifting
Reexamination Certificate
1999-05-21
2001-05-15
Nelms, David (Department: 2818)
Electronic digital logic circuitry
Interface
Supply voltage level shifting
C326S080000
Reexamination Certificate
active
06232794
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of power level conversion within an integrated circuit. More specifically, the present invention relates to the field of reducing the power level of an output signal from a conventional circuit such that the output signal is compatible as an input signal for an ultra low power circuit. Further, the present invention also relates to the field of increasing the power level of an output signal from the ultra low power circuit such that the output signal is compatible as an input signal for the conventional circuit.
BACKGROUND OF THE INVENTION
Conventional circuits are typically constructed of elements such as CMOS devices which require a supply voltage of 3.3 volts. Conventional CMOS devices typically deliver output signals that are up to 3.3 volts. Typical ultra low power (ULP) circuits require a substantially lower supply voltage compared to the conventional circuits. The supply voltage for the ULP circuits are typically 0.5 volts but can range between 0.1 volts to 2.0 volts. The ULP circuits typically deliver output signals that are up to 0.5 volts. The ULP circuits consume less power than the conventional circuits.
The ULP circuits play an important role in many electronic devices. The ULP circuits utilize lower supply voltages and consume less power while in an operating mode and a stand-by mode compared to the conventional circuits. As an added benefit to low power consumption, the ULP circuits also dissipate less heat when compared to the conventional circuits. As a result, the ULP circuits are most suitable for use in portable devices or other devices where minimizing power consumption and/or heat dissipation are important.
The ULP circuits are typically constructed of individual elements such as ULP CMOS devices. The ULP CMOS devices typically have oxide gates which are much thinner than conventional CMOS devices. These thinner oxide gates of the ULP CMOS devices are utilized to compensate for the lower gate voltages of the ULP circuits. As a result, the ULP CMOS devices are more susceptible to failure when input signal voltages exceed a predetermined maximum voltage level. The conventional CMOS devices deliver output signal voltages which can exceed this predetermined maximum voltage level. The ULP circuits cannot withstand these higher output signal voltages associated with the conventional circuits. Accordingly, the ULP circuits are not able to receive input signals from the conventional circuits.
To properly operate, the conventional circuits require a minimum input voltage level and minimum input voltage swings for incoming signals. The ULP circuits, by their nature, are not capable of generating an output signal that reaches the minimum power level or forming output signals which satisfy the minimum input voltage swings required by the conventional circuits. Thus, the ULP circuits are not capable of generating output signals that are compatible as input signals for the conventional circuits.
Therefore, what is needed is an electronic circuit that converts output signals from the convention circuit into an input signal compatible with the ULP circuit. Further, what is needed is an electronic circuit that converts an output signal from the ULP circuit into an input signal compatible with the conventional circuit.
SUMMARY OF THE INVENTION
A system converts output signals from the conventional circuit into input signals configured for the ULP circuit. This system preferably scales down the output signals from the conventional circuit to allow the ULP circuit to receive these signals as corresponding input signals without damaging the ULP circuit. Further, the system also converts output signals from the ULP circuit into input signals configured for the conventional circuit. This system preferably increases the voltage level and voltage swing of the output signals from the ULP circuit to be compatible as corresponding input signals for the conventional circuit. The system allows the conventional circuit to receive a converted input signal corresponding to an output signal from the ULP circuit and the ULP circuit to receive a converted input signal corresponding to an output signal from the conventional circuit. This system ensures that the ULP circuit remains protected from damage while providing the correct corresponding input signal to the appropriate circuit.
The system is a circuit formed in a semiconductor substrate having improved immunity to total ionizing dose radiation. The architecture of the circuit utilizes either the n-well, p-well, or dual-well processes. For example, the preferred embodiment of the system is described relative to a p-well process wherein the p-well is formed in an n-type substrate. A network of conventional NMOS or n-channel ULP transistors can be formed in the p-well, and a network of conventional PMOS or p-channel ULP transistors can be formed in the n-type substrate. Preferably, a contact is electrically coupled to the p-well region and is coupled to first means for independently controlling the voltage in the p-well region. Preferably, another contact is electrically coupled to the n-type substrate and is coupled to second means for independently controlling the voltage in the n-type substrate. By controlling the p-well voltage, the effective threshold voltages of the n-channel transistors both drawn and parasitic are preferably dynamically tuned. Likewise, by controlling the n-type substrate, the effective threshold voltages of the p-channel transistors both drawn and parasitic are also dynamically tuned. Preferably, by optimizing the threshold voltages of the n-channel and p-channel transistors, the total ionizing dose radiation effect is neutralized and lower supply voltages are utilized for the circuit which would result in the circuit requiring less power.
It is an object of the present invention to convert output signals from the conventional circuit into corresponding input signals for the ULP circuit. It is also an object to convert the output signals from the ULP circuit into corresponding input signals for the conventional circuit. It is a further object to provide these circuits with an improved immunity to total ionizing dose radiation.
REFERENCES:
patent: 5666070 (1997-09-01), Merritt et al.
patent: 5834948 (1998-11-01), Yoshizaki et al.
patent: 6064229 (2000-05-01), Morris
Haverstock & Owens LLP
Lam David
Nelms David
University of New Mexico
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