Electronic circuit with a chain of processing elements

Details Electronic circuit with a chain of processing elements Electronic circuit with a chain of processing elements

2007-08-21

2007-08-21

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

C326S096000

Reexamination Certificate

active

10571953

ABSTRACT:
A chain of processing element (10a, 10, 10b) with a logic circuit (14) and a storage element (12) is provided. The storage elements (12) of all except a final processing element (10b) in the chain have one or more outputs coupled to the logic (14) of a next processing element (10a, 10, 10b) in the chain. A timing circuit (16) controls respective loading time points at which the storage elements (12) load data from the logic circuits (14) in respective ones of the processing elements (10a, 10, 10b). The data is loaded progressively later in processing elements (10a, 10, 10b) that successively precede one another in the chain. The time interval between successive loading time points of the final processing element (10b) includes loading time points of loading all processing elements (10a, 10) other than the final processing element (10).

REFERENCES:
patent: 5983339 (1999-11-01), Klim
patent: 6320418 (2001-11-01), Fujii et al.
patent: 6377077 (2002-04-01), Shiraishi
Papachristou Christos et al: “A Multiple Clocking Scheme for Low Power RTL Design”; IEEE Transactions on a Very Large Scale Integration (VLSI) Systems; vol. 7 No. 2; Jun. 1999, pp. 266-276.

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