Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame
Patent
1992-02-28
1995-11-21
Lim, Krisna
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With structure for mounting semiconductor chip to lead frame
257635, 257638, 257678, 257700, H01L 2328, H01L 2704, H05K 310
Patent
active
054689929
ABSTRACT:
An electronic circuit package having a wiring substrate, at least two semiconductor chips and a bus line. All the semiconductor chips to be connected by means of the bus line are bare chip packaged on a wiring substrate, and the semiconductor chips and the wiring substrate are connected by wire bonding between wire bonding pads formed on the semiconductor chips and the wiring substrate. The wiring substrate may be a multilayer element. Preferably, there is an insulating layer partially formed on the surface of the multilayer wiring substrate and a die bonding ground formed on the surface of the insulating layer, thereby making it possible to use a portion of the multilayer wiring substrate under the die bonding ground as a wiring or a via hole region, and at least one of the semiconductor chips is formed on the die bonding ground. The bus line preferably includes two data bus lines, the semiconductor chips connected with one data bus line being formed on one side of the wiring substrate and the semiconductor chips connected with the other data bus line being formed on the other side of the wiring substrate.
REFERENCES:
patent: 4144561 (1979-03-01), Tu et al.
patent: 4441164 (1984-04-01), Paran et al.
patent: 4602271 (1986-07-01), Dougherty, Jr. et al.
patent: 4649474 (1987-03-01), Ambrosius, III et al.
patent: 4722130 (1988-02-01), Kimura et al.
patent: 4746966 (1988-05-01), Fitzgerald et al.
patent: 4783695 (1988-11-01), Eichelberger et al.
patent: 4807284 (1989-02-01), Kleijne
patent: 4811288 (1989-03-01), Kleijne
patent: 4907062 (1990-03-01), Fukushima
patent: 4918811 (1990-04-01), Eichelberger et al.
patent: 4933898 (1990-06-01), Gilberg et al.
patent: 4979289 (1990-12-01), Dunaway et al.
patent: 4993143 (1991-02-01), Adachi et al.
patent: 5016087 (1991-05-01), Haug et al.
patent: 5017993 (1991-05-01), Shibata
patent: 5019943 (1991-05-01), Fassbender et al.
patent: 5050039 (1991-09-01), Edfors
patent: 5081563 (1992-01-01), Feng et al.
patent: 5173844 (1992-12-01), Adachi et al.
patent: 5182632 (1993-01-01), Bechtel et al.
patent: 5185717 (1993-02-01), Mori
patent: 5200810 (1993-04-01), Wojnarowski et al.
patent: 5237203 (1993-08-01), Massaron
patent: 5241456 (1993-08-01), Marcinkiewicz et al.
patent: 5243208 (1993-09-01), Isomura et al.
patent: 5285107 (1994-02-01), Kazami et al.
Akiyama Masatsugu
Ihara Hirokazu
Kanekawa Nobuyasu
Kawabata Kiyoshi
Okishima Tetsuya
Hitachi , Ltd.
Lim Krisna
LandOfFree
Electronic circuit package including plural bare chips mounted o does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electronic circuit package including plural bare chips mounted o, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic circuit package including plural bare chips mounted o will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1139404