Electronic circuit package including plural bare chips mounted o

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame

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Details

257635, 257638, 257678, 257700, H01L 2328, H01L 2704, H05K 310

Patent

active

054689929

ABSTRACT:
An electronic circuit package having a wiring substrate, at least two semiconductor chips and a bus line. All the semiconductor chips to be connected by means of the bus line are bare chip packaged on a wiring substrate, and the semiconductor chips and the wiring substrate are connected by wire bonding between wire bonding pads formed on the semiconductor chips and the wiring substrate. The wiring substrate may be a multilayer element. Preferably, there is an insulating layer partially formed on the surface of the multilayer wiring substrate and a die bonding ground formed on the surface of the insulating layer, thereby making it possible to use a portion of the multilayer wiring substrate under the die bonding ground as a wiring or a via hole region, and at least one of the semiconductor chips is formed on the die bonding ground. The bus line preferably includes two data bus lines, the semiconductor chips connected with one data bus line being formed on one side of the wiring substrate and the semiconductor chips connected with the other data bus line being formed on the other side of the wiring substrate.

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