Electronic circuit design method, simulation apparatus and...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

07086018

ABSTRACT:
An electronic circuit designing method analyzes noise with respect to a wiring pair, and automatically corrects the wiring pair by determining a spacing between wirings of the wiring pair so as to prevent generation of a noise error, if the noise error is detected based on the analysis of the noise.

REFERENCES:
patent: 5502644 (1996-03-01), Hamilton et al.
patent: 6028989 (2000-02-01), Dansky et al.
patent: 6058256 (2000-05-01), Mellen et al.
patent: 6449753 (2002-09-01), Aingaran et al.
patent: 6499131 (2002-12-01), Savithri et al.
patent: 6711726 (2004-03-01), Hirakimoto et al.
patent: 5-143688 (1993-06-01), None
patent: 5-181938 (1993-07-01), None
patent: 9-045775 (1997-02-01), None
patent: 10-256376 (1998-09-01), None
Tilmann Stöhr, Markus Hetzel, Jürgen Koehl Analysis, Reduction and Avoidance of Crosstalk on VLSI Chips pp. 211-218.

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