Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2002-06-25
2004-09-07
Vigushin, John B. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S738000, C257S786000, C174S260000, C361S777000
Reexamination Certificate
active
06787920
ABSTRACT:
TECHNICAL FIELD
The invention relates to the field of electronics manufacturing. More particularly, the invention relates to an electronic circuit board manufacturing process and associated apparatus.
BACKGROUND
An electronic circuit board is a carrier substrate that has components attached to it. The carrier substrate, which can include a printed circuit board, is made of a non-conductive substrate, typically fiberglass, with conductive regions, typically metal planes, wells, and traces, on top of, below, or embedded within the non-conductive substrate to conduct electricity and electrical signals. Components that are attached to a carrier substrate can include resistors, capacitors, inductors, transistors, diodes, connectors, and integrated circuit chips.
Such components typically include external elements, e.g. pins, balls, etc., that provide an electrical and mechanical coupling between the component and the carrier substrate. More specifically, these conductive elements are typically soldered to pads, or contact points, on the carrier substrate.
In the assembly process, solder paste is placed on the pads of the carrier substrate by pushing the solder through apertures, or holes, in a stencil. After the solder paste has been placed on the pads of the carrier substrate, the components are placed on top of the solder paste. The assembled board is then passed through a reflow oven, or some other heat source, to cause the solder paste to melt. When the solder cools, it solidifies and forms an electrically conductive mechanical bond between the pads of the carrier substrate and the components.
FIG. 1
is a graphical illustration of a conventional pad layout on a conventional carrier substrate. As shown, carrier substrate
100
includes a series of rows (
104
) and columns (
102
) of pads, e.g.,
106
,
108
,
110
, and
112
, some of which are electrically coupled with one another through conductive planes, e.g.,
114
,
116
, and
118
. In this example, the pads reside in straight rows and columns, and each pad is positioned to align with corresponding conductive elements (pins, balls, etc.) of the particular integrated circuit chip. The pads that reside on a particular conductive plane are designed to conduct the same electrical voltage as the other pads on that same copper plane. For example, pads
108
,
110
, and
112
are each configured to couple conductive elements of the integrated circuit chip with the voltage of conductive plane
114
. The pads that do not reside on a conductive plane, pad
106
for example, are designed to conduct dedicated signals.
FIG. 2
is a graphical illustration of a conventional solder stencil for use in applying solder paste to the carrier substrate of FIG.
1
. As shown, stencil
200
includes a plurality of apertures, including apertures
202
,
204
,
206
, and
208
, through which solder paste can be selectively applied to the pads of the carrier substrate
100
. Solder paste that is forced through aperture
202
is designed to collect on pad
106
. One skilled in the art would appreciate that the aperture size must be sufficiently large so as to allow for solder paste to move through the aperture.
Problems with assembling electronic circuit boards generally increase as the distance between conductive elements of the component, referred to as the pitch, decreases. A major problem that can occur is bridging. Bridging is a situation where the solder paste has reflowed in a manner that couples two or more conductive elements of a component together. As pads are placed closer together to receive components with a finer pitch, the distance that solder has to move to create a bridge decreases and the likelihood of a bridge occurring increases.
REFERENCES:
patent: 4836435 (1989-06-01), Napp et al.
patent: 5808874 (1998-09-01), Smith
patent: 6078505 (2000-06-01), Turudic
patent: 6084782 (2000-07-01), Huynh et al.
patent: 6137062 (2000-10-01), Zimmerman
patent: 6156980 (2000-12-01), Peugh et al.
patent: 6215670 (2001-04-01), Khandros
patent: 6346679 (2002-02-01), Nakamura
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Vigushin John B.
LandOfFree
Electronic circuit board manufacturing process and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electronic circuit board manufacturing process and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic circuit board manufacturing process and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3240614