Electronic card with dynamic memory allocation management

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

Reexamination Certificate

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Details

C710S003000, C710S005000, C710S007000, C710S022000, C710S056000

Reexamination Certificate

active

06735643

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an electronic card and more particularly to an electronic card with dynamic memory allocation management.
2. Description of Related Art
With the advance of electronic technology, various electronic devices, such as notebook computers, palm computers, PDAs (personal digital assistants), are getting smaller in size. These diminutive electronic devices provide a great convenience to the user due to their portability and data processing capability. However, because of their small size, such an electronic device generally only has basic processing circuit, whereas other circuit modules, such as add-on memory, modem, network card, etc., are provided to the electronic device by inserting a corresponding electronic card therein. This electronic card can also be inserted into a personal computer for enabling data communication or storage function.
Conventionally, such an electronic card is composed of a control chip and a corresponding data processing module. With reference to
FIG. 1
, there is shown the circuit of a memory card
10
, which includes a control chip
11
and a data storage module
12
. The data storage module is preferably a flash memory card. In the memory card
10
, the control chip
11
is provided to control the data exchange between the data storage module
12
and a computer device
19
(such as a card reader, an USB device, or a personal computer) inserted with the memory card
10
, wherein the flash memory must be erased before writing data thereto. Furthermore, when interfacing with the computer device
19
, the card related information, such as CIS (Card Information Structure) for PCMCIA (Personal Computer Memory Card International Association), must be kept. Therefore, in the control chip
11
, various memory blocks must be provided, including a dual-port SRAM (Static Random Access Memory) block
111
for buffering data, a CIS memory block
112
for storing the CIS of the memory card
10
, a register memory block
113
for having the microprocessor execute instructions, and a data memory block
114
for having the microprocessor store data.
Because there are a plurality of memory blocks in the control chip
11
and each memory block has its own decoding logic, these memory blocks and decoding logics will need a lot of spaces in the control chip. As a result, it is difficult to miniaturize the electronic card and to reduce cost. Therefore, it is desirable to provide a novel electronic card to mitigate and/or obviate the aforementioned problems.
SUMMARY OF THE INVENTION
An objective of the present invention is to provide an electronic card with dynamic memory allocation management, which requires only one memory block be partitioned into a plurality of blocks whose sizes and functions can be dynamically adjusted for reducing the occupied space.
Another objective of the present invention is to provide an electronic card with dynamic memory allocation management, wherein the dynamically adjustable memory can be arbitrarily accessed by any controller or be accessed by multiple controllers at the same time.
To achieve the above and other objectives, the electronic card with dynamic memory allocation management includes: a memory; a dynamic memory controller, which is coupled to the memory and has a selector, and at least a first base register, a second base register and a third base register; a first DMA controller, which is coupled to the dynamic memory controller, and provides an output address to be added to a base value of the first base register for retrieving data to or from the memory; a micro-controller, which is coupled to the dynamic memory controller and provides an output address to be added to a base value of the second base register for retrieving data to or from the memory; and a second DMA controller, which is coupled to the dynamic memory controller and provides an output address to be added to a base value of the third base register for retrieving data to or from the memory; wherein, when the micro-controller, the first DMA controller or the second DMA controller issues an access request to the memory, the dynamic memory controller controls the selector to select one of the micro-controller, the first DMA controller, and the second DMA controller for accessing the memory.
Other objectives, advantages, and novel features of the invention will become more apparent from the detailed description when taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 5877975 (1999-03-01), Jigour et al.
patent: 5878272 (1999-03-01), Yanagisawa et al.
patent: 6185641 (2001-02-01), Dunnihoo
patent: 6209042 (2001-03-01), Yanagisawa et al.
patent: 6310884 (2001-10-01), Odenwald, Jr.
patent: 6341328 (2002-01-01), Heer
www.howstuffworks.com, SRAM.*
Patterson and Hennessy, Computer Organization and Design, 1998, Morgan Kaufmann Publishers, pp. 109-116.*
Newton, Harry; Newton's Telecom Dictionary; 2002; CMP Books; 18th edition.

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