Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2000-11-15
2003-09-23
Lefkowitz, Sumati (Department: 2189)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C333S109000, C333S124000, C333S238000, C333S246000, C375S257000, C375S258000
Reexamination Certificate
active
06625682
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to mechanisms for communicating digital data, and in particular to mechanisms for communicating digital data in an electromagnetically-coupled bus system.
2. Background Art
Digital electronics systems, such as computers, must move data among their component devices at increasing rates to take full advantage of the higher speeds at which these component devices operate. For example, a computer may include one or more processors that operate at frequencies of a gigahertz (GHz) or more. The data throughput of these processors outstrips the data delivery bandwidth of conventional systems by significant margins. This discrepancy is mitigated somewhat by intelligent caching of data to maintain frequently used data on the processor chip. However, even the best caching architecture can leave a processor under-utilized. Similar problems arise in any digital system, such as communication networks, routers, backplanes, I/O buses, portable device interfaces, etc., in which data must be transferred among devices that operate at ever higher frequencies.
The digital bandwidth (BW) of a communication channel may be represented as:
BW=F
s
N
s
.
Here, F
s
is the frequency at which symbols are transmitted on a channel and N
s
is the number of bits transmitted per symbol per clock cycle (“symbol density”). Channel refers to a basic unit of communication, for example a board trace in single ended signaling or the two complementary traces in differential signaling. For a typical bus-based system, F
s
is on the order of 200 MHz, N
s
is one, and the bus width (number of channels) is 32, which provides a bus data rate of less than one gigabyte per second.
Conventional strategies for improving BW have focused on increasing one or both of the parameters F
s
and N
s
. However, these parameters cannot be increased without limit. For example, a bus trace behaves like a transmission line for frequencies at which the signal wavelength becomes comparable to the bus dimensions. In this high frequency regime, the electrical properties of the bus must be carefully managed. This is particularly true in standard multi-drop bus systems, which include three or more devices that are electrically connected to each bus trace through parallel stubs. The connections can create discontinuities in the trace impedance, which scatter high frequency signals. Interference between scattered and unscattered signals can significantly reduce signal reliability. The resulting noise can be reduced through careful impedance matching of the system components. However, impedance matching requires the use of precision components, which increases the costs of these systems. In addition to impedance discontinuities, connections to bus traces may also affect system performance by adding capacitance. Capacitance can slow signal propagation speed and lower the trace impedance, which may require larger driver circuits with increased power consumption.
Computer systems based on RAMBUS™ DRAM (RDRAM) technology represent another approach to high speed signaling. For these systems, devices are mounted on daughter cards, which are connected in series with the bus through costly, tightly matched connectors. The impedance-matched series connections eliminate the impedance discontinuities of parallel stubs, but the signal path must traverse each of the daughter cards, increasing its length. In addition, the different daughter card components must be impedance matched to each other and the connectors, and the parasitic capacitances of these components, all of which touch some portion of the bus, further affect the signal propagation speed, impedance, driver size, and power dissipation. These effects taken together seriously constrain the total number of components (or bus capacity) that can be placed on one bus.
Yet another strategy for addressing the frequency limits of conventional bus systems is to replace the direct electrical connection between a bus trace and a device with an indirect, e.g. electromagnetic, coupling. For example, U.S. Pat. No. 5,638,402 discloses a system that employs electromagnetic couplers. The impact of an electromagnetic coupler on the trace impedance depends strongly on the fraction of signal energy it transfers between its coupling components, i.e. its coupling coefficient. A coupler having a large coupling coefficient and/or length transfers a large fraction of the signal energy it samples to its associated device. Large energy transfers can degrade the continuity of the trace impedance as much as standard direct electrical connections. They can also attenuate the signal energy rapidly, and on multi-drop buses, little signal energy may be available to devices that are farther from the signal source. On the other hand, coupling coefficients that are too small or lengths that are too short result in low signal to noise ratios at the devices. In addition, the coupling coefficient is very sensitive to the relative positions of the coupling components. Variations in the relative positions can increase noise on the bus trace or reduce the transferred signal relative to non-scalable noise according to whether the distance decreases or increases, respectively.
Practical BW limits are also created by interactions between the BW parameters; particularly at high frequencies. For example, the greater self-induced noise associated with high frequency signaling limits the reliability with which signals can be resolved. This limits the opportunity for employing higher symbol densities.
Modulation techniques have been employed in some digital systems to encode multiple bits in each transmitted symbol, thereby increasing N
s
. Use of these techniques has been largely limited to point-to-point communication systems, particularly at high signaling frequencies. Because of their higher data densities, encoded symbols can be reliably resolved only in relatively low noise environments. Transmission line effects limit the use of modulation in high frequency communications, especially in multi-drop environments. For example, RDRAM-based systems may use four voltage levels (called QRSL) to increase N
s
to two. More aggressive modulation (amplitude modulation or other schemes) is precluded by the noise environment.
The present invention addresses these and other issues associated with communication of data in digital electronic systems.
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Amirtharajah Rajeevan
Benham John R.
Knight, Jr. Thomas F.
Marketkar Nandu J.
Simon Thomas D.
Blakely , Sokoloff, Taylor & Zafman LLP
Lefkowitz Sumati
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