Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-09-02
2001-09-11
Powell, William A. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C156S345420, C216S071000, C438S710000
Reexamination Certificate
active
06287981
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to an electrode for plasma generation and more particularly, to a plasma processing apparatus.
2. Description of the Related Art
The capacity and functions of semiconductor devices has recently increased with improvements in semiconductor device integration. More semiconductor devices have been formed on a limited size wafer, and the pattern sizes for semiconductor devices have been decreasing in size.
To achieve the improved device integration, ionized process gas (i.e., plasma) has been utilized in semiconductor device fabrication. Specifically, plasma dry etching is used to pattern semiconductor devices. The etching gas in the plasma state contains ions, electrons and radicals.
The plasma dry etching apparatuses for manufacturing semiconductor devices can be divided according to the construction of electrodes to form the plasma and the usage of a magnetic field. For example, the etching apparatus may be a RIE (Reactive Ion Etching) apparatus, a MERIE (Magnetically Enhanced Reactive Ion Etching) apparatus, a CDE (Chemical Downstream Etching) apparatus, an ECR (Electron Cyclotron Resonance) apparatus, a TCP (Transformer Coupled Plasma) apparatus, etc.
FIG. 1
schematically shows a conventional plasma dry etching apparatus. Referring to
FIG. 1
, the apparatus contains a process chamber
10
for performing dry etching by plasma which is generated by ionizing a supplied process gas.
The process chamber
10
contains a gas supply line
12
to supply a process gas into the process chamber
10
. A vacuum line
14
to form a vacuum inside the process chamber
10
is provided on the lower side of the process chamber
10
. A vacuum pump
18
is connected to the vacuum line
14
to perform pumping. A valve
16
is provided on the vacuum line
14
to control the pressure inside the process chamber
10
.
In addition, a lower electrode
20
is provided inside the lower portion of the process chamber
10
. A wafer
22
to be etched is mounted on the lower electrode
20
. An upper electrode
24
is provided in the upper portion of the process chamber
10
. High frequency power is applied to the lower electrode
20
from a high frequency power source
28
. The power is supplied to the lower electrode
20
through a matching box
26
. The high frequency power source
28
and the upper electrode
24
are both grounded.
The etching apparatus operates as follows. First, the valve
16
installed on the vacuum line
14
is opened and the inside of the process chamber
10
is evacuated to a high vacuum state by the operation of the vacuum pump
18
. Then, a process gas such as CF
4
, HBr, Cl
2
, Ar, etc. is supplied into the process chamber
10
through the gas supply line
12
.
Then, when the high frequency power source
28
applies a certain high frequency power to the lower electrode
20
, an electric field is formed inside the process chamber
10
between the lower electrode
20
and the upper electrode
24
. The lower electrode
20
emits electrons which are accelerated with kinetic energy by the electric field into the process gas. The electrons passing through the process gas impart energy to the process gas by colliding with the process gas atoms or molecules. The energized process gas is ionized so as to form ions. The ions are then accelerated by the electric field. The ions pass through the process gas and collide with and ionize further process gas atoms or molecules to generate a plasma state having positive ions, negative ions and radicals.
The positive ions and the radicals from the plasma impinge on the surface of the wafer
22
and etch a certain portion of the wafer. Hence, the wafer
22
is patterned by dry plasma etching. However, the conventional plasma etching process suffers from the problem of non uniform etching over the whole area of the wafer
22
. As shown in
FIG. 2
, the plasma density is constant in a certain region around the center of the process chamber
10
. However, the plasma density decreases toward the edges or peripheral portion of the process chamber. Therefore, the plasma density is non uniform throughout the process chamber.
The non uniform plasma density adversely effects the etching uniformity of the wafer. For a large diameter wafer, such as an 8 inch or a 9 inch wafer, the etch rate at the edge of the wafer is lower than the etch rate at the c (enter of the wafer, which results in an etch failure around the edge of the wafer (i.e., the peripheral areas of the wafer are insufficiently etched which results in formation of defective devices at the periphery of the wafer).
In addition, the value of the plasma density formed inside the process chamber is related to the values of high frequency power and the surface area of the electrode. However, the surface area of the electrode is limited by the placement of other parts inside the process chamber. Therefore, there is a limit on how large the electrode may be made to increase the plasma density. The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.
SUMMARY OF THE INVENTION
In accordance with one aspect of the invention there is provided an electrode for generating a plasma comprising at least one protrusion on a first side of the electrode.
In accordance with another aspect of the invention there is provided a plasma processing apparatus, comprising a process chamber, a first electrode inside the process chamber, a second electrode comprising at least one protrusion opposite to the first electrode, a gas supply line and a high frequency power source electrically connected to at least one of the first electrode and the second electrode.
In accordance with another aspect of the invention there is provided a method of processing a substrate, comprising placing a substrate over a lower electrode, generating a plasma between the lower electrode and an upper electrode containing at least one protrusion, contacting a surface of the substrate with positive ions generated in the plasma and etching a portion of the substrate or depositing a film on the substrate.
REFERENCES:
patent: 4578559 (1986-03-01), Hijikata et al.
patent: 5298720 (1994-03-01), Cuomo et al.
patent: 5399254 (1995-03-01), Geisler et al.
patent: 6010636 (2000-01-01), Donohue et al.
Kim Tae-Hoon
Son Kwon
Powell William A.
Samsung Electronics Co,. Ltd.
The Law Offices of Eugene M. Lee, PLLC
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