Electrolysis: processes – compositions used therein – and methods – Electrolytic erosion of a workpiece for shape or surface... – Local application of electrolyte
Reexamination Certificate
2001-08-01
2004-04-20
Nicolas, Wesley A. (Department: 1742)
Electrolysis: processes, compositions used therein, and methods
Electrolytic erosion of a workpiece for shape or surface...
Local application of electrolyte
C205S670000, C205S640000, C205S671000, C205S672000, C205S650000
Reexamination Certificate
active
06723224
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
Embodiments of the invention generally relate to a method and apparatus for electro-chemical polishing an exposed conductive layer on a substrate.
2. Background of the Related Art
Sub-quarter micron, multi-level metallization is one of the key technologies for the next generation of ultra large scale integration (ULSI). The multilevel interconnects that lie at the heart of this technology require planarization of interconnect features formed in high aspect ratio apertures, including contacts, vias, lines and other features. Reliable formation of these interconnect features is very important to the success of ULSI and to the continued effort to increase circuit density and quality on individual substrates and die.
As circuit densities increase, the widths of vias, contacts, lines, plugs and other features, as well as the dielectric materials between them, decrease to less than 250 nanometers, whereas the thickness of the dielectric layers remains substantially constant, with the result that the aspect ratios for the features, i.e., their height divided by width, increases. Due to copper's good electrical performance at such small feature sizes, copper has become a preferred metal for filling sub-quarter micron, high aspect ratio interconnect features on substrates. However, many traditional deposition processes, such as physical vapor deposition (PVD) and chemical vapor deposition (CVD), have difficulty filling structures with copper material where the aspect ratio exceed 4:1, and particularly where it exceeds 10:1. As a result of these process limitations, electroplating, which had previously been limited to the fabrication of lines on circuit boards, is now being used to fill vias and contacts on semiconductor devices.
Metal electroplating is generally known and can be achieved by a variety of techniques. A typical method generally comprises physical vapor deposition of a barrier layer over the feature surfaces, followed by physical vapor deposition of a conductive metal seed layer, preferably copper, over the barrier layer, and then electroplating a conductive metal over the seed layer to fill the structure/feature. After electroplating, the deposited layers and the dielectric layers are planarized, such as by chemical mechanical polishing, to define a conductive interconnect feature.
Chemical mechanical polishing of copper is difficult. Copper, generally softer than surrounding materials such as oxides, tends to dish during polishing, particularly over large line widths. To maintain planarity during polishing, copper is often polished at a reduced rate compared to typical oxide polishes. As substrate throughput is highly desired, a method of polishing that provides an alternative or facilitates reducing the amount of chemical mechanical polishing systems is desirable.
Electroplating has promise as complementary process or an alternative to chemical mechanical polishing systems. Electroplating generally involves exposing the metal layer (e.g., copper) to an electrolytic fluid. A power source couples a cathode to the metal layer through the electrolytic fluid. As power (usually in the form of a direct current) is applied between the metal layer and the cathode, metal ions are removed from metal layer and dissolved in the electrolyte. The dissolution reaction is Cu→Cu
++
+2 e
−
. If the electropolishing electrolyte is phosphoric acid, the Cu
++
ions combine with (PO
4
)
−
ions, to form a viscous boundary layer of saturated solution of the copper phosphate salt over the metal surface. The boundary layer is electrically more resistive than the bulk of the electrolyte. The reason for the increased resistivity is the lower mobility of Cu
++
ions in the salt solution compared with that of H
+
ions In the acid. If the outer interface between the boundary layer and the electrolyte is flat, the path through the resistive boundary layer from the top of high points on the metal surface to the bulk of the electrolyte is shorter than that from valleys. As a result, the electric current carried by Cu
++
ions is higher from higher points which, in turn, results in preferential dissolution of the high points. The net result is flattening of the surface.
One problem that has prevented the application of electroplating in substrate fabrication is the difficulty of controlling the uniformity of material removal from the metal layer, particularly when the substrate having a copper layer is rotating in a bath of electrolyte. The local current density determines the rate of copper dissolution at any point on the metal layer. The voltage between the electrolyte and the metal layer and the local resistance across the electrolyte determine the local current density. One factor contributing to the local resistance which controls local current density, and thus, the local copper dissolution rate, is the local thickness of a resistive boundary layer that forms between the wafer and the bulk of the electrolyte over any particular location of the metal layer.
Since the wafer is generally rotated during the electroplating process, the boundary layer of the electrolytic fluid is generally thicker at the center of the wafer due to slower linear velocities of the electrolytic fluid across the substrate surface compared with the outer regions of the wafer, due to the round geometry. The thicker resistive boundary layer near the center increases the local resistance, thereby lowering the local current density. The result is slow polishing at the center and faster polishing near the perimeter of the substrate.
The faster polishing near the perimeter of the substrate also aggravates a second factor that contributes to uniform non-uniform polishing. As the electrical contacts between the power source and the metal layer are generally made at the perimeter of the substrate, the resistance between a given point on the metal layer and the electrical contacts increases towards the center of the wafer. Since the resistance through the metal layer is greater when measured farther from the electrical contacts, the increased resistance across the metal layer toward the center results in more sluggish polishing at the center of the wafer. The combination of the two effects results is a metal layer that is substantially thinner near the perimeter of the substrate.
Therefore, there is a need for an improved method and apparatus for polishing a metal layer disposed on a substrate.
SUMMARY OF THE INVENTION
In one aspect of the invention, an apparatus for electro-chemical polishing a metal layer disposed on a substrate is provided. In one embodiment, the electro-chemical polishing apparatus generally includes a substrate support having a plurality of contact members, a cathode and at least one nozzle. The nozzle is adapted to centrally deliver a polishing fluid on a substrate supported by the substrate support. The cathode is adapted to couple the polishing fluid to a negative terminal of a power source. A positive terminal of the power source is electrically coupled through the contact members to the conductive layer of the substrate. The nozzle creates a turbulent flow in the portion of the polishing fluid boundary layer proximate the center of the substrate, which enhances the polishing rate at the center of the substrate.
In another aspect of the invention, a method for polishing a substrate having an exposed conductive layer is provided. In one embodiment, the method for polishing a substrate having an exposed conductive layer includes the steps of coupling a polishing fluid to a negative terminal of the power source, coupling the exposed conductive layer to a positive terminal of the power source and centrally delivering the polishing fluid on the substrate.
In another embodiment of the invention, a method for polishing a substrate having an exposed conductive layer includes the steps of flowing a polishing fluid onto the substrate, the polishing fluid forming a boundary layer adjacent the su
Gandikota Srinivas
McGuirk Christopher R.
Padhi Deenesh
Yahalom Joseph
Applied Materials Inc.
Moser Patterson & Sheridan
Nicolas Wesley A.
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