Electrically erasable programmable read-only memory with thresho

Details Electrically erasable programmable read-only memory with thresho Electrically erasable programmable read-only memory with thresho

1995-01-23

1997-08-12

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518521, 36518517, 36518518, 36518512, G11C 1606

Patent

active

056572700

ABSTRACT:
A non-volatile semiconductor memory device including a plurality of bit lines; a plurality of word lines insulatively intersecting the bit lines; a memory cell array including a plurality of memory cells coupled to the bit lines and the word lines, each memory cell including a transistor with a charge storage portion; a plurality of programming circuits coupled to the memory cell array (i) for storing data which define whether or not write voltages are to be applied to respective of the memory cells, (ii) for selectively applying the write voltages to a part of the memory cells, which part is selected according to the data stored in the plurality of programing circuits, (iii) for determining actual written states of the memory cells, and (iv) for selectively modifying the stored data based on a predetermined logical relationship between the determined actual written states of the memory cells and the data stored in the plurality of programming circuits, thereby applying the write voltages only to memory cells which are not sufficiently written to achieve a predetermined written state.

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