Electrically erasable programmable read only memory cell and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S325000

Reexamination Certificate

active

06903410

ABSTRACT:
An electrically erasable programmable read only memory cell has a stacking layer, a gate conductive layer, a first source/drain region, a second source/drain region, a first pocket implant doping region, and a second pocket implant doping region. The stacking layer is disposed over a substrate. The gate conductive layer is located on the stacking layer. The first source/drain region and the second source/drain region are respectively disposed over the substrate on two sides of the gate conductive layer. The first pocket implant doping region is disposed over the substrate under the stacking layer, and adjacent to the first source/drain region. The second pocket implant doping region is disposed over the substrate under the stacking layer, and adjacent to the second source/drain region, wherein the doping concentration of the first pocket implant region is different from that of the second pocket implant region.

REFERENCES:
patent: 6215148 (2001-04-01), Eitan

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