Electrically erasable programmable read only memory

Static information storage and retrieval – Read/write circuit – Erase

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Details

365185, 357 45, G11C 1300, G11C 1144

Patent

active

043750877

ABSTRACT:
A floating gate tunneling metal oxide semiconductor (FATMOS) transistor is formed in a well region on a semiconductive substrate of a conductivity type opposite to that of the well region, so that charging and discharging of the FATMOS floating gate is accomplished by controlling the potential of the well region. As a result, in an electrically erasable programmable read-only memory, each memory cell requires only one FATMOS transistor, the need for an additional control transistor having been eliminated. Selection of individual memory cells is enhanced by providing a floating gate which only partially overlies the FATMOS transistor channel, so that the overlying FATMOS control electrode performs an "and" gate function independently of the floating gate.

REFERENCES:
patent: 4051464 (1977-09-01), Huang
patent: 4099196 (1978-07-01), Simko
patent: 4162504 (1979-01-01), Hsu
patent: 4184207 (1980-01-01), McElroy

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