Static information storage and retrieval – Read/write circuit – Erase
Patent
1993-06-21
1995-03-28
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Erase
365900, G11C 1300
Patent
active
054023831
ABSTRACT:
An electrically erasable non-volatile semiconductor memory device has a memory cell array, a first erase unit, a second erase unit, and an operation mode establish unit. The erasing operation of the second erase unit is independently carried out of the erasing operation of the first erase unit. When a first operation mode is established by the operation mode establish unit, the second erase unit is inactivated, and the erasing operation of the memory cell array is only carried out by the first erase unit. On the other hand, when a second operation mode is established by the operation mode establish unit, the erasing operation of the first erase unit for a part of the memory cell array is disable, and the second erase unit is activated and the erasing operation for the part of the memory cell array is carried out by the second erase unit. Therefore, the change between a boot block type flash memory and normal type flash memory can be realized only by changing an establish value of the operation mode establish unit. Consequently, when developing both boot block type flash memory and normal type flash memory, these two types of flash memories can be obtained by using the same chip or by carrying out only minimum changes, so that the developing processes can be greatly decreased.
REFERENCES:
patent: 4658377 (1987-04-01), McElroy
patent: 5065364 (1991-11-01), Atwood et al.
"Das andere Speichermedium Flash-Speicher als Ersatz fur ROMs, SRAMs, DRAMs und mechanische Laufwerke", Moosburger, Elektronik, vol. 14, No. 17, Aug. 18, 1992, pp. 77-82.
"28F001BX-T/28F001BX-B 1M (128Kx8) CMOS Flash Memory", Advance Information, Intel Corporation, Mar. 1991, pp. 1-27.
Fears Terrell W.
Fujitsu Limited
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