Electrically erasable memory matrix (EEPROM)

Details Electrically erasable memory matrix (EEPROM) Electrically erasable memory matrix (EEPROM)

1983-02-28

1985-07-02

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Flip-flop

365189, G11C 1140

Patent

active

045272565

ABSTRACT:
EEPROM showing storage cells comprising a tunnel injector which at the one hand is connected to a first bit line by means of the source-drain-line of a floating gate FET and at the other hand to a second bit line by means of the source-drain-line of a selection FET. Interferences between addressed groups and not addressed groups of storage cells during writing are eliminated by means of connection of the first bitline of the not addressed groups via the source-drain-lines of a depletion type FET and an enhancement FET to ground.

REFERENCES:
patent: 4441168 (1984-04-01), Luciw
patent: 4441169 (1984-04-01), Sasaki et al.

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