Electrically erasable and reprogrammable, nonvolatile integrated

Details Electrically erasable and reprogrammable, nonvolatile integrated Electrically erasable and reprogrammable, nonvolatile integrated

1997-12-29

2000-08-15

Lintz, Paul R.

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

36518533, G06F 1750, G11C 1604

Patent

active

061029637

ABSTRACT:
An in-system programmable and verifiable (ISPAV) configuration restoring device (CROP device) has an Electrically Erasable and reprogrammable, NonVolatile Integrated Storage array (e.g., a FLASH EE.sub.-- NVIS array) into which configuration instructions may be written for later readout during configuration restoration of a Programmable Logic Device (PLD) where the PLD has a volatile configuration memory. The volatile PLD may be an FPGA or a CPLD. The ISPAV CROP device includes a shared shift register through which configuration instructions read from the EE.sub.-- NVIS array are serially shifted out to a to-be-configured PLD. The shared shift register is also used for loading new configuration instructions into the EE.sub.-- NVIS array by way of a 4-wire interface such as JTAG and also for verifying proper writing of these instructions into the EE.sub.-- NVIS array.

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