Electrically erasable and programmable read only memory

Static information storage and retrieval – Floating gate – Data security

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Details

365195, 365233, G11C 700

Patent

active

058809929

ABSTRACT:
An electrically erasable and programmable read only memory (EEPROM) device is disclosed. The EEPROM device includes a memory array coupled to an address bus and a data bus; a register located in a predetermined memory area of the EEPROM device for latching a data bit from the data bus when the address of the register is selected, in which the data bit functions as program enable or disable signal; and means for setting program enable or disable state of the EEPROM device in response to input of the output signal of the register and write enable signal. The register consists of a D-flip flop which has a clock input connected with the write enable signal, and the program enable or disable state setting means includes an OR gate. With this, simple configuration of the system Input/Output address is possible. This invention also effectively interrupts the write enable signal (WE) supplied with the EEPROM memory block after the data input is completed. Thus, loss of data in the memory block is effectively prevented.

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