Electrically erasable and programmable non-volatile semiconducto

Details Electrically erasable and programmable non-volatile semiconducto Electrically erasable and programmable non-volatile semiconducto

1992-11-19

1994-07-26

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

36518906, 365185, G11C 700

Patent

active

053331222

ABSTRACT:
A flash memory is operable using a single power supply voltage. In this flash memory, an internal booster circuit boosts the supply voltage to generate a write voltage higher than the supply voltage. A row decoder is connected to word lines, which are connected to memory cells. Upon reception of an address signal, the row decoder selects a word line specified by this address signal. A row-line clamp circuit, which is connected to the internal booster circuit and the word lines, supplies the write voltage to a word line selected at the time of data writing, and drops the write voltage and supplies it to the selected word line at the time of write verify.

REFERENCES:
patent: 4737936 (1988-04-01), Takeuchi
patent: 4893275 (1990-01-01), Tanaka et al.
patent: 4967399 (1990-10-01), Kuwabara et al.
patent: 5058063 (1991-10-01), Wada et al.
patent: 5140557 (1992-08-01), Yoshida

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